SNVSBV1C February   2022  – December 2023 LMQ66410-Q1 , LMQ66420-Q1 , LMQ66430-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 System Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Enable, Start-Up, and Shutdown
      2. 7.3.2  External CLK SYNC (With MODE/SYNC)
        1. 7.3.2.1 Pulse-Dependent MODE/SYNC Pin Control
      3. 7.3.3  Power-Good Output Operation
      4. 7.3.4  Internal LDO, VCC, and VOUT/FB Input
      5. 7.3.5  Bootstrap Voltage and VBOOT-UVLO (BOOT Terminal)
      6. 7.3.6  Output Voltage Selection
      7. 7.3.7  Spread Spectrum
      8. 7.3.8  Soft Start and Recovery from Dropout
        1. 7.3.8.1 Recovery from Dropout
      9. 7.3.9  Current Limit and Short Circuit
      10. 7.3.10 Thermal Shutdown
      11. 7.3.11 Input Supply Current
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Active Mode
        1. 7.4.3.1 CCM Mode
        2. 7.4.3.2 Auto Mode – Light Load Operation
          1. 7.4.3.2.1 Diode Emulation
          2. 7.4.3.2.2 Frequency Reduction
        3. 7.4.3.3 FPWM Mode – Light Load Operation
        4. 7.4.3.4 Minimum On-Time (High Input Voltage) Operation
        5. 7.4.3.5 Dropout
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design 1 - Automotive Synchronous Buck Regulator at 2.2 MHz
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Choosing the Switching Frequency
          2. 8.2.1.2.2  Setting the Output Voltage
            1. 8.2.1.2.2.1 VOUT / FB for Adjustable Output
          3. 8.2.1.2.3  Inductor Selection
          4. 8.2.1.2.4  Output Capacitor Selection
          5. 8.2.1.2.5  Input Capacitor Selection
          6. 8.2.1.2.6  CBOOT
          7. 8.2.1.2.7  VCC
          8. 8.2.1.2.8  CFF Selection
          9. 8.2.1.2.9  External UVLO
          10. 8.2.1.2.10 Maximum Ambient Temperature
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Design 2 - Automotive Synchronous Buck Regulator at 400 kHz
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Ground and Thermal Considerations
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
      2. 9.1.2 Device Nomenclature
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

GUID-20231023-SS0I-HG7V-KD1V-QS2NS5M7LJDZ-low.svg Figure 5-1 RXB 14-Pin (2.6 mm × 2.6 mm) Enhanced HotRod™ VQFN-FCRLF Package (Top View)
Table 5-1 Pin Functions
PIN TYPE DESCRIPTION
NAME NO.
EN/UVLO 1 A Enable input to regulator. High = ON, low = OFF. Can be connected directly to VIN. Do not float this pin.
NC 2 — No internal connection to device
VIN 3 P Input supply to regulator. Two 22-nF capacitors are connected in series internally from this pin to the PGND pin. Additional high-quality bypass capacitor or capacitors can be added directly to this pin and PGND.
NC 4 — Middle point of the two internal series bypass capacitors. Leave this pin floating.
NC 5 — Middle point of the two internal series bypass capacitors. Leave this pin floating.
PGND 6 G Power ground terminal. Connect to system ground. Connect to CIN with short, wide traces.
SW 7 P Regulator switch node. Connect to the power inductor.
BOOT 8 P Bootstrap supply voltage for internal high-side driver. A 0.1-µF capacitor is internally connected from this pin to the SW pin.
NC 9 — No internal connection to device
VCC 10 A Internal LDO output. Used as supply to internal control circuits. Do not connect to external loads. Can be used as logic supply for power-good flag. Connect a high-quality 1-µF capacitor from this pin to GND.
VOUT/FB 11 A Fixed output options and adjustable output options are available with the VOUT/FB pin variant. Connect to the output voltage node for fixed VOUT. See VOUT / FB for Adjustable Output for how to select feedback resistor divider values. See Device Comparison Table for more details. The FB function can be used to adjust the output voltage. Connect to tap point of feedback voltage divider. Do not float this pin.
NC 12 — No internal connection to device
MODE/SYNC 13 A This pin allows the user to select between PFM/FPWM mode or to synchronize to an external clock. See MODE/SYNC variant for more details.Do not float this pin.
PG 14 A Open-drain power-good flag output. Connect to suitable voltage supply through a current limiting resistor. High = power OK, low = power bad. This pin goes low when EN = low. This pin can be open or grounded when not used.
GND/DAP — G Thermal pad of the package. Must be soldered to achieve appropriate dissipation. Must be connected to GND.
A = Analog, P = Power, G = Ground