SNVSAG4A November   2015  – July 2016 LMR14020-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed Frequency Peak Current Mode Control
      2. 7.3.2  Slope Compensation
      3. 7.3.3  Sleep-mode
      4. 7.3.4  Low Dropout Operation and Bootstrap Voltage (BOOT)
      5. 7.3.5  Adjustable Output Voltage
      6. 7.3.6  Enable and Adjustable Under-voltage Lockout
      7. 7.3.7  External Soft-start
      8. 7.3.8  Switching Frequency and Synchronization (RT/SYNC)
      9. 7.3.9  Power Good (PGOOD)
      10. 7.3.10 Over Current and Short Circuit Protection
      11. 7.3.11 Overvoltage Protection
      12. 7.3.12 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
      3. 7.4.3 CCM Mode
      4. 7.4.4 Light Load Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Voltage Set-Point
        2. 8.2.2.2 Switching Frequency
        3. 8.2.2.3 Output Inductor Selection
        4. 8.2.2.4 Output Capacitor Selection
        5. 8.2.2.5 Schottky Diode Selection
        6. 8.2.2.6 Input Capacitor Selection
        7. 8.2.2.7 Bootstrap Capacitor Selection
        8. 8.2.2.8 Soft-start Capacitor Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
      2. 11.2.2 Related Product
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

Over the recommended operating junction temperature range of -40°C to 125°C (unless otherwise noted) (1)
MIN MAX UNIT
Input Voltages VIN, EN to GND -0.3 44 V
BOOT to GND -0.3 49
SS to GND -0.3 5
FB to GND -0.3 7
RT/SYNC to GND -0.3 3.6
PGOOD to GND -0.3 7
Output Voltages BOOT to SW 6.5 V
SW to GND -3 44
TJ Junction temperature -40 150 °C
Tstg Storage temperature -65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002 (1) ±2000 V
Charged-device model (CDM), per AEC Q100-011 ±750
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

Over the recommended operating junction temperature range of -40°C to 125°C (unless otherwise noted) (1)
MIN MAX UNIT
Buck Regulator VIN 4 40 V
VOUT 0.8 28
BOOT 45
SW -1 40
FB 0 5
Control EN 0 40 V
RT/SYNC 0 3.3
SS 0 3
PGOOD to GND 0 5
Frequency Switching frequency range at RT mode 200 2500 kHz
Switching frequency range at SYNC mode 250 2300
Temperature Operating junction temperature, TJ -40 125 °C
(1) Operating Ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications, see Electrical Characteristics .

6.4 Thermal Information

THERMAL METRIC (1) (2) LMR14020-Q1 UNIT
DDA (HSOIC) DPR (WSON)
8 PINS 10 PINS
RθJA Junction-to-ambient thermal resistance 42.5 36.5 °C/W
ψJT Junction-to-top characterization parameter 9.9 0.3 °C/W
ψJB Junction-to-board characterization parameter 25.4 13.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 56.1 35.2 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 3.8 3.1 °C/W
RθJB Junction-to-board thermal resistance 25.5 13.6 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
(2) Power rating at a specific ambient temperature TA should be determined with a maximum junction temperature (TJ) of 125°C, which is illustrated in Recommended Operating Conditions section.

6.5 Electrical Characteristics

Limits apply over the recommended operating junction temperature (TJ) range of -40°C to +125°C, unless otherwise stated. Minimum and Maximum limits are specified through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise specified, the following conditions apply: VIN = 4.0 V to 40 V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SUPPLY (VIN PIN)
VIN Operation input voltage 4 40 V
UVLO Under voltage lockout thresholds Rising threshold 3.5 3.7 3.9 V
Hysteresis 285 mV
ISHDN Shutdown supply current VEN = 0 V, TJ = 25 °C, 4.0 V ≤ VIN ≤ 40 V 1.0 3.0 μA
IQ Operating quiescent current (non- switching) VFB = 1.0 V, TJ = 25 °C 40 μA
ENABLE (EN PIN)
VEN_TH EN Threshold Voltage 1.05 1.20 1.38 V
IEN_PIN EN PIN current Enable threshold +50 mV -4.6 μA
Enable threshold -50 mV -1.0
IEN_HYS EN hysteresis current -3.6 μA
EXTERNAL SOFT-START
ISS SS pin current TJ = 25 °C -3.0 μA
POWER GOOD (PGOOD PIN)
VPG_UV Power-good flag under voltage tripping threshold POWER GOOD (% of FB voltage) 94%
POWER BAD (% of FB voltage) 92%
VPG_OV Power-good flag over voltage tripping threshold POWER BAD (% of FB voltage) 109%
POWER GOOD (% of FB voltage) 107%
VPG_HYS Power-good flag recovery hysteresis % of FB voltage 2%
IPG PGOOD leakage current at high level output VPull-Up = 5 V 10 200 nA
VPG_LOW PGOOD low level output voltage IPull-Up = 1 mA 0.1 V
VIN_PG_MIN Minimum VIN for valid PGOOD output VPull-Up < 5 V at IPull-Up = 100 μA 1.6 1.95 V
VOLTAGE REFERENCE (FB PIN)
VFB Feedback voltage TJ = 25 °C 0.744 0.750 0.756 V
TJ = -40 °C to 125 °C 0.735 0.750 0.765 V
HIGH-SIDE MOSFET
RDS_ON On-resistance VIN = 12 V, BOOT to SW = 5.8 V 90 180 mΩ
HIGH-SIDE MOSFET CURRENT LIMIT
ILIMT Current limit VIN = 12 V, TJ = -40 °C to 125 °C, Open Loop 2.13 3.15 4.6 A
THERMAL PERFORMANCE
TSHDN Thermal shutdown threshold 170 °C
THYS Hysteresis 12

6.6 Switching Characteristics

Over the recommended operating junction temperature range of -40°C to 125°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
fSW Switching frequency RT = 11.5 kΩ 1758 1912 2066 kHz
Switching frequency range at SYNC mode 250 2300
FDITHER Switching frequency dithering Spread spectrum option, frequency dithering over center frequency ±6%
VSYNC_HI SYNC clock high level threshold 1.7 V
VSYNC_LO SYNC clock low level threshold 0.5
TSYNC_MIN Minimum SYNC input pulse width Measured at 500 kHz, VSYNC_HI > 3 V, VSYNC_LO < 0.3 V 30 ns
TLOCK_IN PLL lock in time Measured at 500 kHz 100 µs
TON_MIN Minimum controllable on time VIN = 12 V, BOOT to SW = 5.8 V, ILoad = 1 A 75 ns
DMAX Maximum duty cycle fSW = 200 kHz 97%

6.7 Typical Characteristics

Unless otherwise specified the following conditions apply: VIN = 12 V, fSW = 1 MHz, L = 5.5 µH, COUT = 47 µF, TA = 25°C.
LMR14020-Q1 D002_SNVSA81.gif
VOUT = 5 V fSW = 1 MHz
Figure 1. Efficiency vs. Load Current
LMR14020-Q1 D009_SNVSA81.gif
VOUT = 3.3 V fSW = 1 MHz
Figure 3. Efficiency vs. Load Current
LMR14020-Q1 D004_SNVSA81.gif
VOUT = 5 V fSW = 1 MHz
Figure 5. Load Regulation
LMR14020-Q1 D011_SNVSA81.gif
VOUT = 5 V fSW = 1 MHz
Figure 7. Dropout Curve
LMR14020-Q1 D013_SNVSA81.gif
VOUT = 3.3 V fSW = 1 MHz
Figure 9. Dropout Curve
LMR14020-Q1 D006_SNVSA81.gif
Figure 11. Shut-down Current and Quiescent Current
LMR14020-Q1 D003_SNVSA81.gif
VOUT = 5 V fSW = 2.2 MHz
Figure 2. Efficiency vs. Load Current
LMR14020-Q1 D010_SNVSA81.gif
VOUT = 3.3 V fSW = 2.2 MHz
Figure 4. Efficiency vs. Load Current
LMR14020-Q1 D005_SNVSA81.gif
Figure 6. Frequency vs VFB
LMR14020-Q1 D012_SNVSA81.gif
VOUT = 5 V fSW = 2.2 MHz
Figure 8. Dropout Curve
LMR14020-Q1 D014_SNVSA81.gif
VOUT = 3.3 V fSW = 2.2 MHz
Figure 10. Dropout Curve
LMR14020-Q1 D007_SNVSA81.gif
IOUT = 0 A
Figure 12. UVLO Threshold