SNVSAG2A November   2015  – July 2016 LMR14050-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed Frequency Peak Current Mode Control
      2. 7.3.2  Slope Compensation
      3. 7.3.3  Sleep-mode
      4. 7.3.4  Low Dropout Operation and Bootstrap Voltage (BOOT)
      5. 7.3.5  Adjustable Output Voltage
      6. 7.3.6  Enable and Adjustable Under-voltage Lockout
      7. 7.3.7  External Soft-start
      8. 7.3.8  Switching Frequency and Synchronization (RT/SYNC)
      9. 7.3.9  Power Good (PGOOD)
      10. 7.3.10 Over Current and Short Circuit Protection
      11. 7.3.11 Overvoltage Protection
      12. 7.3.12 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
      3. 7.4.3 CCM Mode
      4. 7.4.4 Light Load Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Voltage Set-Point
        2. 8.2.2.2 Switching Frequency
        3. 8.2.2.3 Output Inductor Selection
        4. 8.2.2.4 Output Capacitor Selection
        5. 8.2.2.5 Schottky Diode Selection
        6. 8.2.2.6 Input Capacitor Selection
        7. 8.2.2.7 Bootstrap Capacitor Selection
        8. 8.2.2.8 Soft-start Capacitor Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
      2. 11.2.2 Related Product
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

DDA Package
8-Pin (HSOIC)
Top View
LMR14050-Q1 pin_diag_snvsag2.gif
DPR Package
10-Pin (WSON)
Top View
LMR14050-Q1 pin_diagram_snvsag2.gif

Pin Functions

NAME NO. TYPE (1) DESCRIPTION
SO-8 WSON-10
BOOT 1 1 P Bootstrap capacitor connection for high-side MOSFET driver. Connect a high quality 0.1 μF capacitor from BOOT to SW.
VIN 2 2, 3 P Connect to power supply and bypass capacitors CIN. Path from VIN pin to high frequency bypass CIN and GND must be as short as possible.
EN 3 4 A Enable pin, with internal pull-up current source. Pull below 1.2 V to disable. Float or connect to VIN to enable. Adjust the input under voltage lockout with two resistors. See the Enable and Adjusting Under voltage lockout section.
RT/SYNC 4 5 A Resistor Timing or External Clock input. An internal amplifier holds this pin at a fixed voltage when using an external resistor to ground to set the switching frequency. If the pin is pulled above the PLL upper threshold, a mode change occurs and the pin becomes a synchronization input. The internal amplifier is disabled and the pin is a high impedance clock input to the internal PLL. If clocking edges stop, the internal amplifier is re-enabled and the operating mode returns to frequency programming by resistor.
FB 5 7 A Feedback input pin, connect to the feedback divider to set VOUT. Do not short this pin to ground during operation.
SS 6 6 A Soft-start control pin. Connect to a capacitor to set soft-start time.
PGOOD N/A 8 A Open drain output for power-good flag. Use a 10 kΩ to 100 kΩ pull-up resistor to logic rail or other DC voltage no higher than 7V.
GND 7 9 G System ground pin.
SW 8 10 P Switching output of the regulator. Internally connected to high-side power MOSFET. Connect to power inductor.
Thermal Pad 9 11 G Major heat dissipation path of the die. Must be connected to ground plane on PCB.
(1) A = Analog, P = Power, G = Ground