SNVSAC1 June   2015 LMR16006Y-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Fixed Frequency PWM Control
      2. 8.3.2 Bootstrap Voltage (CB)
      3. 8.3.3 Output Voltage Setting
      4. 8.3.4 Enable SHDN and VIN Undervoltage Lockout
      5. 8.3.5 Current Limit
      6. 8.3.6 Overvoltage Transient Protection
      7. 8.3.7 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Continuous Conduction Mode
      2. 8.4.2 ECO Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Inductor Selection
        2. 9.2.2.2 Output Capacitor Selection
        3. 9.2.2.3 Schottky Diode Selection
        4. 9.2.2.4 Input Capacitor Selection
        5. 9.2.2.5 Bootstrap Capacitor Selection
      3. 9.2.3 Application Curves
      4. 9.2.4 Additional Application Circuit
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Detailed Description

8.1 Overview

The LMR16006Y-Q1 device is a 60 V, 600 mA, step-down (buck) regulator. The buck regulator has a very low quiescent current during light load to prolong battery life.

LMR16006Y-Q1 improves performance during line and load transients by implementing a constant frequency, current mode control which requires less output capacitance and simplifies frequency compensation design. The switching frequency is fixed at 2.1 MHz, thus smaller inductor and capacitor can be used. The device reduces the external component count by integrating the boot recharge diode. The bias voltage for the integrated high side MOSFET is supplied by a capacitor on the CB to SW pin. The boot capacitor voltage is monitored by an UVLO circuit and will turn the high side MOSFET off when the boot voltage falls below a preset threshold. The LMR16006Y-Q1 can operate at high duty cycles because of the boot UVLO and refresh the wimp FET. The output voltage can be stepped down to as low as the 0.8 V reference. Internal soft-start is featured to minimize inrush currents.

8.2 Functional Block Diagram

LMR16006Y-Q1 fbd_internal_snvsac1.gif

8.3 Feature Description

8.3.1 Fixed Frequency PWM Control

The LMR16006Y-Q1 implements peak current mode control. The output voltage is compared through external resistors on the FB pin to an internal voltage reference by an error amplifier which drives the internal COMP node. An internal oscillator initiates the turn on of the high side power switch. The error amplifier output is compared to the high side power switch current. When the power switch current reaches the level set by the internal COMP voltage, the power switch is turned off. The internal COMP node voltage will increase and decrease as the output current increases and decreases. The device implements a current limit by clamping the COMP node voltage to a maximum level.

8.3.2 Bootstrap Voltage (CB)

The LMR16006Y-Q1 has an integrated boot regulator, and requires a small ceramic capacitor between the CB and SW pins to provide the gate drive voltage for the high side MOSFET. The CB capacitor is refreshed when the high side MOSFET is off and the low side diode conducts. To improve drop out, the LMR16006Y-Q1 is designed to operate at 97% duty cycle as long as the CB to SW pin voltage is greater than 3 V. When the voltage from CB to SW drops below 3 V, the high side MOSFET is turned off using an UVLO circuit which allows the low side diode to conduct and refresh the charge on the CB capacitor. Since the supply current sourced from the CB capacitor is low, the high side MOSFET can remain on for more switching cycles than are required to refresh the capacitor, thus the effective duty cycle of the switching regulator is high. Attention must be taken in maximum duty cycle applications with light load. To ensure SW can be pulled to ground to refresh the CB capacitor, an internal circuit will charge the CB capacitor when the load is light or the device is working in dropout condition.

8.3.3 Output Voltage Setting

The output voltage is set using the feedback pin and a resistor divider connected to the output as shown on the front page schematic. The feedback pin voltage 0.765 V, so the ratio of the feedback resistors sets the output voltage according to the following equation: VOUT = 0.765 V (1 + (R1/R2)). Typically R2 will be given as 1 kΩ to 100 kΩ for a starting value. To solve for R1 given R2 and VOUT use R1 = R2 ((VOUT/0.765 V) – 1).

8.3.4 Enable SHDN and VIN Undervoltage Lockout

LMR16006Y-Q1 SHDN pin is a high voltage tolerant input with an internal pull up circuit. The device can be enabled even if the SHDN pin is floating. The regulator can also be turned on using 1.23 V or higher logic signals. If the use of a higher voltage is desired due to system or other constraints, a 100 kΩ or larger resistor is recommended between the applied voltage and the SHDN pin to protect the device. When SHDN is pulled down to 0 V, the chip is turned off and enters the lowest shutdown current mode. In shutdown mode the supply current will be decreased to approximately 1 µA. If the shutdown function is not to be used the SHDN pin may be tied to VIN via 100 kΩ resistor. The maximum voltage to the SHDN pin should not exceed 60 V. LMR16006Y-Q1 has an internal UVLO circuit to shutdown the output if the input voltage falls below an internally fixed UVLO threshold level. This ensures that the regulator is not latched into an unknown state during low input voltage conditions. The regulator will power up when the input voltage exceeds the voltage level. If there is a requirement for a higher UVLO voltage, the SHDN can be used to adjust the system UVLO by using external resistors.

8.3.5 Current Limit

The LMR16006Y-Q1 implements current mode control which uses the internal COMP voltage to turn off the high side MOSFET on a cycle-by-cycle basis. Each cycle the switch current and internal COMP voltage are compared, when the peak switch current intersects the COMP voltage, the high side switch is turned off. During overcurrent conditions that pull the output voltage low, the error amplifier will respond by driving the COMP node high, increasing the switch current. The error amplifier output is clamped internally, which functions as a switch current limit.

8.3.6 Overvoltage Transient Protection

The LMR16006Y-Q1 incorporates an overvoltage transient protection (OVTP) circuit to minimize voltage overshoot when recovering from output fault conditions or strong unload transients on power supply designs with low value output capacitance. For example, when the power supply output is overloaded the error amplifier compares the actual output voltage to the internal reference voltage. If the FB pin voltage is lower than the internal reference voltage for a considerable time, the output of the error amplifier will respond by clamping the error amplifier output to a high voltage. Thus, requesting the maximum output current. Once the condition is removed, the regulator output rises and the error amplifier output transitions to the steady state duty cycle. In some applications, the power supply output voltage can respond faster than the error amplifier output can respond, this actuality leads to the possibility of an output overshoot. The OVTP feature minimizes the output overshoot, when using a low value output capacitor, by implementing a circuit to compare the FB pin voltage to OVTP threshold which is 108% of the internal voltage reference. If the FB pin voltage is greater than the OVTP threshold, the high side MOSFET is disabled preventing current from flowing to the output and minimizing output overshoot. When the FB voltage drops lower than the OVTP threshold, the high side MOSFET is allowed to turn on at the next clock cycle.

8.3.7 Thermal Shutdown

The device implements an internal thermal shutdown to protect itself if the junction temperature exceeds 170°C(typ). The thermal shutdown forces the device to stop switching when the junction temperature exceeds the thermal trip threshold. Once the junction temperature decreases below 160°C(typ), the device reinitiates the power up sequence.

8.4 Device Functional Modes

8.4.1 Continuous Conduction Mode

The LMR16006Y-Q1 steps the input voltage down to a lower output voltage. In continuous conduction mode (when the inductor current never reaches zero at CCM), the buck regulator operates in two cycles. The power switch is connected between VIN and SW. In the first cycle of operation the transistor is closed and the diode is reverse biased. Energy is collected in the inductor and the load current is supplied by Cout and the rising current through the inductor. During the second cycle the transistor is open and the diode is forward biased due to the fact that the inductor current cannot instantaneously change direction. The energy stored in the inductor is transferred to the load and output capacitor. The ratio of these two cycles determines the output voltage. The output voltage is defined approximately as: D = VOUT/VIN and D' = (1-D) where D is the duty cycle of the switch, D and D' will be required for design calculations.

8.4.2 ECO Mode

The LMR16006Y-Q1 operates in ECO mode at light load currents to improve efficiency by reducing switching and gate drive losses. The LMR16006Y-Q1 is designed so that if the output voltage is within regulation and the peak switch current at the end of any switching cycle is below the sleep current threshold, IINDUCTOR ≤ 80 mA, the device enters ECO mode. For ECO mode operation, the LMR16006Y-Q1 senses peak current, not average or load current, so the load current where the device enters ECO mode is dependent on VIN, VOUT and the output inductor value. When the load current is low and the output voltage is within regulation, the device enters an ECO mode and draws only 28 µA input quiescent current.