SNVSAH3E February   2018  – July 2020 LMR23625

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fixed-Frequency Peak-Current-Mode Control
      2. 7.3.2 Adjustable Output Voltage
      3. 7.3.3 Enable/Sync
      4. 7.3.4 VCC, UVLO
      5. 7.3.5 Minimum ON-time, Minimum OFF-time and Frequency Foldback at Drop-out Conditions
      6. 7.3.6 Internal Compensation and CFF
      7. 7.3.7 Bootstrap Voltage (BOOT)
      8. 7.3.8 Overcurrent and Short-Circuit Protection
      9. 7.3.9 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
      3. 7.4.3 CCM Mode
      4. 7.4.4 Light Load Operation (PFM Option)
      5. 7.4.5 Light Load Operation (FPWM Option)
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design With WEBENCH® Tools
        2. 8.2.2.2  Output Voltage Setpoint
        3. 8.2.2.3  Switching Frequency
        4. 8.2.2.4  Inductor Selection
        5. 8.2.2.5  Output Capacitor Selection
        6. 8.2.2.6  Feed-forward Capacitor
        7. 8.2.2.7  Input Capacitor Selection
        8. 8.2.2.8  Bootstrap Capacitor Selection
        9. 8.2.2.9  VCC Capacitor Selection
        10. 8.2.2.10 Undervoltage Lockout Set-Point
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Compact Layout for EMI Reduction
    4. 10.4 Ground Plane and Thermal Considerations
    5. 10.5 Feedback Resistors
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Custom Design With WEBENCH® Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DDA|8
  • DRR|12
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.6 Internal Compensation and CFF

The LMR23625 device is internally compensated as shown in Section 7.2. The internal compensation is designed such that the loop response is stable over the entire operating frequency and output voltage range. Depending on the output voltage, the compensation loop phase margin can be low with all ceramic capacitors. TI recommends an external feedforward capacitor CFF be placed in parallel with the top resistor divider RFBT for optimum transient performance.

GUID-5E023667-192B-4FFE-9029-7CA3A879CE5F-low.gifFigure 7-8 Feed-forward Capacitor for Loop Compensation

The feed-forward capacitor CFF in parallel with RFBT places an additional zero before the crossover frequency of the control loop to boost phase margin. The zero frequency can be found by:

Equation 6. GUID-8E102D94-C7D0-4D03-981E-74690A3DF76F-low.gif

An additional pole is also introduced with CFF at the frequency of:

Equation 7. GUID-517F8DC3-68B2-43FB-86E1-F5BD8AF14A9C-low.gif

The zero fZ_CFF adds phase boost at the crossover frequency and improves transient response. The pole fP-CFF helps maintaining proper gain margin at frequency beyond the crossover. Table 8-1 lists the combination of COUT, CFF and RFBT for typical applications,  designs with similar COUT but RFBT other than recommended value, adjust CFF so that (CFF × RFBT) is unchanged and adjust RFBB such that (RFBT / RFBB) is unchanged.

Designs with different combinations of output capacitors need different CFF. Different types of capacitors have different equivalent series resistance (ESR). Ceramic capacitors have the smallest ESR and need the most CFF. Electrolytic capacitors have much larger ESR than ceramic, and the ESR zero frequency location would be low enough to boost the phase up around the crossover frequency. Designs that use mostly electrolytic capacitors at the output may not need any CFF. The location of this ESR zero frequency can be calculated with Equation 8:

Equation 8. GUID-177EDDEA-700C-4BF9-9B82-29D0E26C7F1C-low.gif

The CFF creates a time constant with RFBT that couples in the attenuate output voltage ripple to the FB node. If the CFF value is too large, it can couple too much ripple to the FB and affect VOUT regulation. Therefore, calculate CFF based on output capacitors used in the system. At cold temperatures, the value of CFF might change based on the tolerance of the chosen component. This may reduce its impedance and ease noise coupling on the FB node. To avoid this, more capacitance can be added to the output or the value of CFF can be reduced.