SNVSAH3E February   2018  – July 2020 LMR23625

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fixed-Frequency Peak-Current-Mode Control
      2. 7.3.2 Adjustable Output Voltage
      3. 7.3.3 Enable/Sync
      4. 7.3.4 VCC, UVLO
      5. 7.3.5 Minimum ON-time, Minimum OFF-time and Frequency Foldback at Drop-out Conditions
      6. 7.3.6 Internal Compensation and CFF
      7. 7.3.7 Bootstrap Voltage (BOOT)
      8. 7.3.8 Overcurrent and Short-Circuit Protection
      9. 7.3.9 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
      3. 7.4.3 CCM Mode
      4. 7.4.4 Light Load Operation (PFM Option)
      5. 7.4.5 Light Load Operation (FPWM Option)
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design With WEBENCH® Tools
        2. 8.2.2.2  Output Voltage Setpoint
        3. 8.2.2.3  Switching Frequency
        4. 8.2.2.4  Inductor Selection
        5. 8.2.2.5  Output Capacitor Selection
        6. 8.2.2.6  Feed-forward Capacitor
        7. 8.2.2.7  Input Capacitor Selection
        8. 8.2.2.8  Bootstrap Capacitor Selection
        9. 8.2.2.9  VCC Capacitor Selection
        10. 8.2.2.10 Undervoltage Lockout Set-Point
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Compact Layout for EMI Reduction
    4. 10.4 Ground Plane and Thermal Considerations
    5. 10.5 Feedback Resistors
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Custom Design With WEBENCH® Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DDA|8
  • DRR|12
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.1 Fixed-Frequency Peak-Current-Mode Control

The following operating description of the LMR23625 refers to Section 7.2 and to the waveforms in Figure 7-1. The LMR23625 device is a step-down synchronous buck regulator with integrated high-side (HS) and low-side (LS) switches (synchronous rectifier). The device supplies a regulated output voltage by turning on the HS and LS NMOS switches with controlled duty cycle. During high-side switch ON time, the SW pin voltage swings up to approximately VIN, and the inductor current iL increases with linear slope (VIN – VOUT) / L. When the HS switch is turned off by the control logic, the LS switch is turned on after an anti-shoot-through dead time. Inductor current discharges through the LS switch with a slope of –VOUT / L. The control parameter of a buck converter is defined as duty cycle D = tON / TSW, where tON is the high-side switch ON time and TSW is the switching period. The regulator control loop maintains a constant output voltage by adjusting the duty cycle D. In an ideal buck converter, where losses are ignored, D is proportional to the output voltage and inversely proportional to the input voltage: D = VOUT / VIN.

GUID-08C296A4-A800-4AEF-9AAA-F9AF75E2F7D1-low.gifFigure 7-1 SW Node and Inductor Current Waveforms in Continuous Conduction Mode (CCM)

The LMR23625 employs fixed-frequency peak current mode control. A voltage feedback loop is used to get accurate DC voltage regulation by adjusting the peak current command based on voltage offset. The peak inductor current is sensed from the high-side switch and compared to the peak current threshold to control the ON time of the high-side switch. The voltage feedback loop is internally compensated, which allows for fewer external components, makes it easy to design, and provides stable operation with almost any combination of output capacitors. The regulator operates with fixed switching frequency at normal load condition. At light load condition, the LMR23625 operates in PFM mode to maintain high efficiency (PFM option) or in FPWM mode for low output-voltage ripple, tight output voltage regulation, and constant switching frequency (FPWM option).