SNVSAR6B December   2016  – March 2018 LMR23630-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
      2.      Efficiency vs Load, VIN = 12 V, PFM Option
  4. 4 Revision History
  5. 5 Product Portfolio
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Characteristics
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Fixed-Frequency Peak-Current-Mode Control
      2. 8.3.2  Adjustable Frequency
      3. 8.3.3  Adjustable Output Voltage
      4. 8.3.4  Enable/Synchronization
      5. 8.3.5  VCC, UVLO
      6. 8.3.6  Minimum ON-time, Minimum OFF-time and Frequency Foldback at Dropout Conditions
      7. 8.3.7  Power Good (PGOOD)
      8. 8.3.8  Internal Compensation and CFF
      9. 8.3.9  Bootstrap Voltage (BOOT)
      10. 8.3.10 Overcurrent and Short-Circuit Protection
      11. 8.3.11 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Active Mode
      3. 8.4.3 CCM Mode
      4. 8.4.4 Light Load Operation (PFM Option)
      5. 8.4.5 Light Load Operation (FPWM Option)
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Custom Design With WEBENCH® Tools
        2. 9.2.2.2  Output Voltage Setpoint
        3. 9.2.2.3  Switching Frequency
        4. 9.2.2.4  Inductor Selection
        5. 9.2.2.5  Output Capacitor Selection
        6. 9.2.2.6  Feed-Forward Capacitor
        7. 9.2.2.7  Input Capacitor Selection
        8. 9.2.2.8  Bootstrap Capacitor Selection
        9. 9.2.2.9  VCC Capacitor Selection
        10. 9.2.2.10 UVLO Setpoint
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Compact Layout for EMI Reduction
      2. 11.1.2 Ground Plane and Thermal Considerations
      3. 11.1.3 Feedback Resistors
    2. 11.2 Layout Examples
  12. 12Device and Documentation Support
    1. 12.1 Custom Design With WEBENCH® Tools
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DDA|8
  • DRR|12
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.6 Minimum ON-time, Minimum OFF-time and Frequency Foldback at Dropout Conditions

Minimum ON-time, TON_MIN, is the smallest duration of time that the HS switch can be on. TON_MIN is typically 60 ns in the LMR23630-Q1. Minimum OFF-time, TOFF_MIN, is the smallest duration that the HS switch can be off. TOFF_MIN is typically 100 ns in the LMR23630-Q1. In CCM operation, TON_MIN and TOFF_MIN  limit the voltage conversion range given a selected switching frequency.

The minimum duty cycle allowed is:

Equation 3. DMIN = TON_MIN × fSW

And the maximum duty cycle allowed is:

Equation 4. DMAX = 1 – TOFF_MIN × fSW

Given fixed TON_MIN and TOFF_MIN, the higher the switching frequency the narrower the range of the allowed duty cycle. In the LMR23630-Q1, a frequency foldback scheme is employed to extend the maximum duty cycle when TOFF_MIN is reached. The switching frequency decreases once longer duty cycle is needed under low VIN conditions. Wide range of frequency foldback allows the LMR23630-Q1 output voltage stay in regulation with a much lower supply voltage VIN. This leads to a lower effective dropout voltage.

Given an output voltage, the choice of the switching frequency affects the allowed input voltage range, solution size and efficiency. The maximum operation supply voltage can be found by:

Equation 5. LMR23630-Q1 equation_02_snvsah2.gif

At lower supply voltage, the switching frequency will decrease once TOFF_MIN is tripped. The minimum VIN without frequency foldback can be approximated by:

Equation 6. LMR23630-Q1 equation_03_snvsah2.gif

Taking considerations of power losses in the system with heavy load operation, VIN_MAX is higher than the result calculated in Equation 5. With frequency foldback, VIN_MIN is lowered by decreased fSW.

LMR23630-Q1 D013_SNVSAH2.gifFigure 20. Frequency Foldback at Dropout (VOUT = 5 V, fSW = 400 kHz)