SNVS737F October   2011  – June 2019 LMR24220

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Descriptions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Ratings
    3. 6.3 Electrical Characteristics
    4. 6.4 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  CoT Control Circuit Overview
      2. 7.3.2  Start-up Regulator (VCC)
      3. 7.3.3  Regulation Comparator
      4. 7.3.4  Zero Coil Current Detect
      5. 7.3.5  Overvoltage Comparator
      6. 7.3.6  On-Time Timer, Shutdown
      7. 7.3.7  Current Limit
      8. 7.3.8  N-Channel MOSFET and Driver
      9. 7.3.9  Soft Start
      10. 7.3.10 Thermal Protection
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Detailed Design Procedure
        1. 8.2.1.1 Custom Design With WEBENCH® Tools
        2. 8.2.1.2 External Components
      2. 8.2.2 Application Curve
  9. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Package Considerations
    3. 9.3 Thermal Derating
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
        1. 10.1.1.1 Custom Design With WEBENCH® Tools
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Community Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3 Electrical Characteristics

Specifications with standard type are for TJ = 25°C only; limits in boldface type apply over the full Operating Junction Temperature (TJ) range. Minimum and maximum limits are ensured through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated the following conditions apply: VIN = 18 V, VOUT = 3.3 V.(3)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
START-UP REGULATOR, VCC
VCC VCC output voltage CCC = 680nF, no load 5.0 6.0 7.2 V
VIN - VCC VIN - VCC dropout voltage ICC = 20mA 350 mV
IVCCL VCC current limit(4) VCC = 0V 40 65 mA
VCC-UVLO VCC under-voltage lockout threshold (UVLO) VIN increasing 3.55 3.75 3.95 V
VCC-UVLO-HYS VCC UVLO hysteresis VIN decreasing – DSBGA package 150 mV
tVCC-UVLO-D VCC UVLO filter delay 3 µs
IIN IIN operating current No switching, VFB = 1V 0.7 1 mA
IIN-SD IIN operating current, Device shutdown VEN = 0V 25 40 µA
SWITCHING CHARACTERISTICS
RDS-UP-ON Main MOSFET RDS(on) 0.18 0.375 Ω
RDS- DN-ON Syn. MOSFET RDS(on) 0.11 0.225 Ω
VG-UVLO Gate drive voltage UVLO VBST - VSW increasing 3.3 4.2 V
SOFT START
ISS SS pin source current VSS = 0.5V 11 µA
CURRENT LIMIT
ICL Syn. MOSFET current limit threshold LMR24220 2.156 2.8 3.4 A
ON/OFF TIMER
ton ON timer pulse width VIN = 10V, RON = 100 kΩ 1.38 µs
VIN = 30V, RON = 100 kΩ 0.47
ton-MIN ON timer minimum pulse width 150 ns
toff OFF timer pulse width 260 ns
ENABLE INPUT
VEN EN Pin input threshold VEN rising 1.13 1.18 1.23 V
VEN-HYS Enable threshold hysteresis VEN falling 90 mV
REGULATION AND OVERVOLTAGE COMPARATOR
VFB In-regulation feedback voltage VSS ≥ 0.8V
TJ = −40°C to +125°C		 0.784 0.8 0.816 V
VFB-OV Feedback overvoltage threshold 0.888 0.920 0.945 V
IFB FB pin current 5 nA
THERMAL SHUTDOWN
TSD Thermal shutdown temperature TJ rising 165 °C
TSD-HYS Thermal shutdown temperature hysteresis TJ falling 20 °C
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is intended to be functional. For ensured specifications and test conditions, see the Electrical Characteristics.
(2) The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin.
(3) Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate Average Outgoing Quality Level (AOQL).
(4) VCC provides self bias for the internal gate drive and control circuits. Device thermal limitations limit external loading.
(5) θJA calculations were performed in general accordance with JEDEC standards JESD51–1 to JESD51–11.
(6) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications.