SNVS737F October   2011  – June 2019 LMR24220

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Descriptions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Ratings
    3. 6.3 Electrical Characteristics
    4. 6.4 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  CoT Control Circuit Overview
      2. 7.3.2  Start-up Regulator (VCC)
      3. 7.3.3  Regulation Comparator
      4. 7.3.4  Zero Coil Current Detect
      5. 7.3.5  Overvoltage Comparator
      6. 7.3.6  On-Time Timer, Shutdown
      7. 7.3.7  Current Limit
      8. 7.3.8  N-Channel MOSFET and Driver
      9. 7.3.9  Soft Start
      10. 7.3.10 Thermal Protection
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Detailed Design Procedure
        1. 8.2.1.1 Custom Design With WEBENCH® Tools
        2. 8.2.1.2 External Components
      2. 8.2.2 Application Curve
  9. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Package Considerations
    3. 9.3 Thermal Derating
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
        1. 10.1.1.1 Custom Design With WEBENCH® Tools
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Community Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.1 Layout Guidelines

The LMR24220 regulation, overvoltage, and current limit comparators are very fast and may respond to short duration noise pulses. Layout is therefore critical for optimum performance. It must be as neat and compact as possible, and all external components must be as close to their associated pins of the LMR24220 as possible (refer to Functional Block Diagram). The loop formed by CIN, the main and synchronous MOSFET internal to the LMR24220, and the PGND pin must be as small as possible. The connection from the PGND pin to CIN must be as short and direct as possible. Add vias to connect the ground of CIN to a ground plane, located as close as possible to the capacitor. Connect the bootstrap capacitor CBST as close as possible to the SW and BST pins—the connecting traces should be thick. The feedback resistors and capacitor RFB1, RFB2, and CFB must be close to the FB pin. A long trace running from VOUT to RFB1 is generally acceptable since this is a low impedance node. Ground RFB2 directly to the AGND pin. Connect the output capacitor COUT close to the load and tied directly to the ground plane. Connect the inductor L close to the SW pin with as short a trace as possible to reduce the potential for EMI (electromagnetic interference) generation. If it is expected that the internal dissipation of the LMR24220 will produce excessive junction temperature during normal operation, making good use of the PC board’s ground plane can help considerably to dissipate heat. Additionally, the use of thick traces, where possible, can help conduct heat away from the LMR24220. Judicious positioning of the PC board within the end product, along with the use of any available air flow (forced or natural convection) can help reduce the junction temperature.