SNVSBB5B September   2019  – September 2020 LMR36503-Q1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD (Automotive) Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Characteristics
    7. 7.7 Switching Characteristics
    8. 7.8 System Characteristics
    9. 7.9 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Enable, Start-up and Shutdown
      2. 8.3.2  External CLK SYNC (with MODE/SYNC)
        1. 8.3.2.1 Pulse-Dependent MODE/SYNC Pin Control
      3. 8.3.3  Adjustable Switching Frequency (with RT)
      4. 8.3.4  Power-Good Output Operation
      5. 8.3.5  Internal LDO, VCC UVLO, and VOUT/BIAS Input
      6. 8.3.6  Bootstrap Voltage and VCBOOT-UVLO (CBOOT Terminal)
      7. 8.3.7  Output Voltage Selection
      8. 8.3.8  Soft Start and Recovery from Dropout
        1. 8.3.8.1 Recovery from Dropout
      9. 8.3.9  Current Limit and Short Circuit
      10. 8.3.10 Thermal Shutdown
      11. 8.3.11 Input Supply Current
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Standby Mode
      3. 8.4.3 Active Mode
        1. 8.4.3.1 CCM Mode
        2. 8.4.3.2 Auto Mode - Light Load Operation
          1. 8.4.3.2.1 Diode Emulation
          2. 8.4.3.2.2 Frequency Reduction
        3. 8.4.3.3 FPWM Mode - Light Load Operation
        4. 8.4.3.4 Minimum On-time (High Input Voltage) Operation
        5. 8.4.3.5 Dropout
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Choosing the Switching Frequency
        2. 9.2.2.2 Setting the Output Voltage
          1. 9.2.2.2.1 FB for Adjustable Output
        3. 9.2.2.3 Inductor Selection
        4. 9.2.2.4 Output Capacitor Selection
        5. 9.2.2.5 Input Capacitor Selection
        6. 9.2.2.6 CBOOT
        7. 9.2.2.7 VCC
        8. 9.2.2.8 CFF Selection
          1. 9.2.2.8.1 External UVLO
        9. 9.2.2.9 Maximum Ambient Temperature
      3. 9.2.3 Application Curves
    3. 9.3 What to Do and What Not to Do
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Ground and Thermal Considerations
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Maximum Ambient Temperature

As with any power conversion device, the LMR36503-Q1 dissipates internal power while operating. The effect of this power dissipation is to raise the internal temperature of the converter above ambient. The internal die temperature (TJ) is a function of the ambient temperature, the power loss, and the effective thermal resistance, RθJA, of the device and PCB combination. The maximum junction temperature for the LMR36503-Q1 must be limited to 150°C. This establishes a limit on the maximum device power dissipation and, therefore, the load current. Equation 12 shows the relationships between the important parameters. It is easy to see that larger ambient temperatures (TA) and larger values of RθJA reduce the maximum available output current. The converter efficiency can be estimated by using the curves provided in this data sheet. If the desired operating conditions cannot be found in one of the curves, interpolation can be used to estimate the efficiency. Alternatively, the EVM can be adjusted to match the desired application requirements and the efficiency can be measured directly. The correct value of RθJA is more difficult to estimate. As stated in the Semiconductor and IC Package Thermal Metrics Application Report, the values given in Section 7.4 are not valid for design purposes and must not be used to estimate the thermal performance of the application. The values reported in that table were measured under a specific set of conditions that are rarely obtained in an actual application.

Equation 12. GUID-F61A2C5D-0A01-45B4-82A1-5051FF2999D7-low.gif

where

  • η = efficiency

The effective RθJA is a critical parameter and depends on many factors such as the following:

  • Power dissipation
  • Air temperature/flow
  • PCB area
  • Copper heat-sink area
  • Number of thermal vias under the package
  • Adjacent component placement

A typical example of RθJA versus copper board area can be found in Figure 9-3. The copper area given in the graph is for each layer. For a 4-layer PCB design, the top and bottom layers are 2-oz. copper each, while the inner layers are 1 oz. For a 2-layer PCB design, the top and bottom layers are 2-oz. copper each. Note that the data given in these graphs are for illustration purposes only, and the actual performance in any given application depends on all of the factors mentioned above.

Using the value of RθJA from Figure 9-3 for a given PCB copper area and ΨJT from Section 7.4, one can approximate the junction temperature of the IC for a given operating condition using Equation 13

Equation 13. TJ ≈ TA + RθJA x IC Power Loss

where

  • TJ = IC Junction Temperature (°C)
  • TA = Ambient Temperature (°C)
  • RθJA = Thermal Resistance (°C/W)
  • IC Power Loss = Power loss for the IC (W)

The IC Power loss mentioned above is the overall power loss minus the loss that comes from the inductor DC Resistance. The overall power loss can be approximated from the efficiency curves in the Section 9.2.3 or by using WEBENCH for a specific operating condition and temperature.

GUID-9E9C796F-C322-467A-A204-81B32BC42B2A-low.gifFigure 9-3 RθJA versus PCB Copper Area for the VQFN (RPE) Package

Use the following resources as guides to optimal thermal PCB design and estimating RθJA for a given application environment: