SNVSCJ0A
November 2023 – February 2024
LMR38025-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Device Comparison Table
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
System Characteristics
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Fixed Frequency Peak Current Mode Control
7.3.2
Adjustable Output Voltage
7.3.3
Enable
7.3.4
Switching Frequency and Synchronization (RT/SYNC)
7.3.5
Power-Good Flag Output
7.3.6
Minimum On Time, Minimum Off Time, and Frequency Foldback
7.3.7
Bootstrap Voltage
7.3.8
Overcurrent and Short-Circuit Protection
7.3.9
Soft Start
7.3.10
Thermal Shutdown
7.4
Device Functional Modes
7.4.1
Auto Mode
7.4.2
Forced PWM Operation
7.4.3
Dropout
7.4.4
Minimum Switch On Time
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Custom Design With WEBENCH® Tools
8.2.2.2
Choosing the Switching Frequency
8.2.2.3
FB for Adjustable Output
8.2.2.4
Inductor Selection
8.2.2.5
Output Capacitor Selection
8.2.2.6
Input Capacitor Selection
8.2.2.7
CBOOT
8.2.2.8
External UVLO
8.2.2.9
Maximum Ambient Temperature
8.2.3
Application Curves
8.3
Best Design Practices
8.4
Power Supply Recommendations
8.5
Layout
8.5.1
Layout Guidelines
8.5.1.1
Ground and Thermal Considerations
8.5.2
Layout Example
9
Device and Documentation Support
9.1
Device Support
9.1.1
Third-Party Products Disclaimer
9.1.2
Development Support
9.1.2.1
Custom Design With WEBENCH® Tools
9.2
Documentation Support
9.2.1
Related Documentation
9.3
Receiving Notification of Documentation Updates
9.4
Support Resources
9.5
Trademarks
9.6
Electrostatic Discharge Caution
9.7
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DRR|12
MPSS085A
Thermal pad, mechanical data (Package|Pins)
DRR|12
PPTD366A
Orderable Information
snvscj0a_oa
snvscj0a_pm
7.3
Feature Description