SLUSEP7 December   2022 LMR51440 , LMR51450

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2.     ESD Ratings
    3. 7.2 Recommended Operating Conditions
    4. 7.3 Thermal Information
    5. 7.4 Electrical Characteristics
    6. 7.5 System Characteristics
    7. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Fixed Frequency Peak Current Mode Control
      2. 8.3.2  Adjustable Output Voltage
      3. 8.3.3  Enable
      4. 8.3.4  Switching Frequency
      5. 8.3.5  Power-Good Flag Output
      6. 8.3.6  Minimum ON-Time, Minimum OFF-Time, and Frequency Foldback
      7. 8.3.7  Bootstrap Voltage
      8. 8.3.8  Overcurrent and Short-Circuit Protection
      9. 8.3.9  Soft Start
      10. 8.3.10 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Active Mode
      3. 8.4.3 CCM Mode
      4. 8.4.4 Light-Load Operation (PFM Version)
      5. 8.4.5 Light-Load Operation (FPWM Version)
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Voltage Set-Point
        2. 9.2.2.2 Switching Frequency
        3. 9.2.2.3 Inductor Selection
        4. 9.2.2.4 Output Capacitor Selection
        5. 9.2.2.5 Input Capacitor Selection
        6. 9.2.2.6 Bootstrap Capacitor
        7. 9.2.2.7 Undervoltage Lockout Set-Point
      3. 9.2.3 Application Curves
    3. 9.3 Best Design Practices
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
        1. 9.5.1.1 Compact Layout for EMI Reduction
        2. 9.5.1.2 Feedback Resistors
      2. 9.5.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Development Support
        1. 10.1.1.1 Custom Design With WEBENCH® Tools
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.5.1.1 Compact Layout for EMI Reduction

Radiated EMI is generated by the high di/dt components in pulsing currents in switching converters. The larger area covered by the path of a pulsing current, the more EMI is generated. High frequency ceramic bypass capacitors at the input side provide primary path for the high di/dt components of the pulsing current. Placing a ceramic bypass capacitor or capacitors as close as possible to the VIN and PGND pins is the key to EMI reduction.

The SW pin connecting to the inductor must be as short as possible, and just wide enough to carry the load current without excessive heating. Short, thick traces or copper pours (shapes) must be used for high current conduction path to minimize parasitic resistance. The output capacitors must be placed close to the VOUT end of the inductor and closely grounded to PGND pin.