SNAS872 December 2024 LMR60410
PRODMIX
Dropout operation occurs when the input voltage approaches the desired output voltage and is defined as any input-to-output voltage ratio that requires frequency to drop to achieve the required duty cycle. In dropout operation duty cycle is limited by minimum off-time for a given clock frequency. Figure 7-10 shows the switch node voltage and inductor current waveforms during dropout. During dropout operation, the LMR60410 extends the high-side switch on-time past the end of the clock cycle until the needed peak inductor current is achieved. The clock is allowed to start a new cycle after peak inductor current is achieved or after a pre-determined maximum on-time of approximately 10µs passes. As a result, after the needed duty cycle cannot be achieved at the selected clock frequency due to the existence of a minimum off-time, frequency drops to maintain regulation. As shown in Figure 7-11, if input voltage is low enough so that output voltage cannot be regulated even with an on-time of tON-MAX, output voltage drops to slightly below the input voltage by VDROP. The magnitude of VDROP depends on resistive losses across the internal MOSFETs, the series resistance of the inductor, as well as printed circuit board resistance. Once the input voltage increases beyond the output voltage setpoint, the output votlage increases as though in soft start as described in Section 7.3.2.