SNAS714C November   2016  – August 2021 LMS3635-Q1 , LMS3655-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Tables
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Thermal Information (for Device Mounted on PCB)
    6. 7.6 Electrical Characteristics
    7. 7.7 System Characteristics
    8. 7.8 Timing Requirements
    9. 7.9 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
      1. 8.2.1 Control Scheme
    3. 8.3 Feature Description
      1. 8.3.1 RESET Flag Output
      2. 8.3.2 Enable and Start-Up
      3. 8.3.3 Soft-Start Function
      4. 8.3.4 Current Limit
      5. 8.3.5 Hiccup Mode
      6. 8.3.6 Synchronizing Input
      7. 8.3.7 Undervoltage Lockout (UVLO) and Thermal Shutdown (TSD)
      8. 8.3.8 Input Supply Current
    4. 8.4 Device Functional Modes
      1. 8.4.1 AUTO Mode
      2. 8.4.2 FPWM Mode
      3. 8.4.3 Dropout
      4. 8.4.4 Spread-Spectrum Operation
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 General Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 9.2.1.2.2 External Components Selection
            1. 9.2.1.2.2.1 Input Capacitors
            2. 9.2.1.2.2.2 Output Inductors and Capacitors
              1. 9.2.1.2.2.2.1 Inductor Selection
              2. 9.2.1.2.2.2.2 Output Capacitor Selection
          3. 9.2.1.2.3 Setting the Output Voltage
          4. 9.2.1.2.4 FB for Adjustable Output
          5. 9.2.1.2.5 VCC
          6. 9.2.1.2.6 BIAS
          7. 9.2.1.2.7 CBOOT
          8. 9.2.1.2.8 Maximum Ambient Temperature
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Fixed 5-V Output for USB-Type Applications
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
      3. 9.2.3 Fixed 3.3-V Output
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
        3. 9.2.3.3 Application Curves
      4. 9.2.4 6-V Adjustable Output
        1. 9.2.4.1 Design Requirements
        2. 9.2.4.2 Detailed Design Procedure
        3. 9.2.4.3 Application Curves
    3. 9.3 Do's and Don't's
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
      2. 12.1.2 Development Support
        1. 12.1.2.1 Custom Design With WEBENCH® Tools
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.1 Overview

The LMS36x5-Q1 devices are wide-input voltage range, low quiescent current, high-performance regulators with internal compensation. This device is designed to minimize end-product cost and size while operating in demanding automotive and high-performance industrial environments. Normal operating frequency is 400 kHz, allowing the use of small passive components. This device has a low unloaded current consumption, eliminating the need for an external backup LDO. The LMS36x5-Q1 low shutdown current and high maximum operating voltage also allow for the elimination of an external load switch. To further reduce system cost, an advanced reset output is provided, which can often eliminate the use of an external reset or supervisor device.

The LMS36x5-Q1 is designed with a flip-chip or HotRod™ technology, greatly reducing the parasitic inductance of the pins. In addition, the layout of the device allows for partial cancellation of the current generated magnetic field which reduces the radiated noise generated by the switching action.

As a result the switch-node waveform exhibits less overshoot and ringing.

GUID-C21F9236-3827-42AB-92EF-AF42042D9FA0-low.pngFigure 8-1 Switch Node Waveform (VIN = 13.5 V, IOUT = 5.5 A)

The LMS36x5-Q1 is AEC-Q1-qualified and has electrical characteristics ensured up to a maximum junction temperature of 150°C.

The LMS36x5-Q1 is available in a VQFN package with wettable flanks which allows easy inspection of the soldering without the requirement of x-ray checks.

Note:

Throughout this data sheet, references to the LMS3635-Q1 apply equally to the LMS3655-Q1. The difference between the two devices is the maximum output current and specified MOSFET current limits.