SLOSE67D june   2020  – april 2023 LMV321A-Q1 , LMV324A-Q1 , LMV358A-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: LMV321A-Q1
    5. 6.5 Thermal Information: LMV358A-Q1
    6. 6.6 Thermal Information: LMV324A-Q1
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Voltage
      2. 7.3.2 Input Common Mode Range
      3. 7.3.3 Rail-to-Rail Output
      4. 7.3.4 Overload Recovery
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 LMV3xxA-Q1 Low-Side, Current Sensing Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Single-Supply Photodiode Amplifier
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Input and ESD Protection
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

GUID-C700F204-82C5-4C3C-A094-B685398C7CF0-low.gifFigure 5-1 LMV321A-Q1 DBV Package,
5-Pin SOT-23
(Top View)
GUID-E98B8089-D8B9-4212-AAF4-637428F9919C-low.gifFigure 5-2 LMV321A-Q1 DCK, LMV321AU-Q1 DBV Package,
5-Pin SC70, SOT-23
(Top View)
Table 5-1 Pin Functions: LMV321A-Q1
PIN TYPE(1) DESCRIPTION
NAME DBV DCK, DBV (U)
–IN 4 3 I Inverting input
+IN 3 1 I Non-inverting input
OUT 1 4 O Output
V– 2 2 — Negative (lowest) supply or ground (for single-supply operation)
V+ 5 5 — Positive (highest) supply
(1) I = input, O = output
GUID-6B4EAC5A-00C4-4FBC-B1E7-9D084FF7C816-low.gif Figure 5-3 LMV358A-Q1 D and DGK Packages,
8-Pin SOIC and VSSOP
(Top View)
Table 5-2 Pin Functions: LMV358A-Q1
PIN TYPE(1) DESCRIPTION
NAME NO.
–IN A 2 I Inverting input, channel A
+IN A 3 I Non-inverting input, channel A
–IN B 6 I Inverting input, channel B
+IN B 5 I Non-inverting input, channel B
OUT A 1 O Output, channel A
OUT B 7 O Output, channel B
V– 4 — Negative (lowest) supply or ground (for single-supply operation)
V+ 8 — Positive (highest) supply
(1) I = input, O = output
GUID-25E85076-C453-4DA9-8553-30561F348609-low.gif Figure 5-4 LMV324A-Q1 D, PW, and DYY Packages,
14-Pin SOIC, TSSOP, and SOT-23
(Top View)
Table 5-3 Pin Functions: LMV324A-Q1
PIN TYPE(1) DESCRIPTION
NAME NO.
–IN A 2 I Inverting input, channel A
+IN A 3 I Non-inverting input, channel A
–IN B 6 I Inverting input, channel B
+IN B 5 I Non-inverting input, channel B
–IN C 9 I Inverting input, channel C
+IN C 10 I Non-inverting input, channel C
–IN D 13 I Inverting input, channel D
+IN D 12 I Non-inverting input, channel D
OUT A 1 O Output, channel A
OUT B 7 O Output, channel B
OUT C 8 O Output, channel C
OUT D 14 O Output, channel D
V– 11 — Negative (lowest) supply or ground (for single-supply operation)
V+ 4 — Positive (highest) supply
(1) I = input, O = output