SLOS447I September   2004  – May 2016 LMV341 , LMV342 , LMV344

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: V+ = 2.7 V
    6. 6.6 Electrical Characteristics: V+ = 5 V
    7. 6.7 Shutdown Characteristics: V+ = 2.7 V
    8. 6.8 Shutdown Characteristics: V+ = 5 V
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 PMOS Input Stage
      2. 7.3.2 CMOS Output Stage
      3. 7.3.3 Shutdown
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • DGK|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

LMV34x devices have rail-to-rail output and input range from ground to VCC – 1 V. CMOS inputs provide very low input current. Shutdown capability is an option in dual amplifier version. Operation from 2.5-V to 5.5-V is possible.

8.2 Typical Application

A typical application for an operational amplifier in an inverting amplifier. This amplifier takes a positive voltage on the input, and makes it a negative voltage of the same magnitude. In the same manner, it also makes negative voltages positive.

LMV341 LMV342 LMV344 app_sch.gif Figure 37. Application Schematic

8.2.1 Design Requirements

The supply voltage must be chosen such that it is larger than the input voltage range and output range. For instance, this application scales a signal of ±0.5 V to ±1.8 V. Setting the supply at ± 2 V is sufficient to accommodate this application. The supplies can power up in any order; however, neither supply can be of opposite polarity relative to ground at any time; otherwise, a large current can flow though the input ESD diodes. To limit current in such an occurrence, TI highly recommends adding a series resistor to the grounded input. Vsup+ must be more positive than Vsup– at all times; otherwise, a large reverse supply current may flow.

8.2.2 Detailed Design Procedure

Determine the gain required by the inverting amplifier using Equation 1 and Equation 2.

Equation 1. LMV341 LMV342 LMV344 app_eq1.gif
Equation 2. LMV341 LMV342 LMV344 app_eq2.gif

Once the desired gain is determined, choose a value for RI or RF. Choosing a value in the kΩ range is desirable because the amplifier circuit uses currents in the mA range. This ensures the part does not draw too much current. For this example, choose 10 kΩ for RI, which means 36 kΩ is used for RF. This was determined by Equation 3.

Equation 3. LMV341 LMV342 LMV344 app_eq3.gif

8.2.3 Application Curve

LMV341 LMV342 LMV344 app_graph.gif Figure 38. Input and Output Voltages of the Inverting Amplifier