The LMV61x devices are single, dual, and quad low-voltage, low-power operational amplifiers (op amps). They are designed specifically for low-voltage, general-purpose applications. Other important product characteristics are, rail-to-rail input or output, low supply voltage of 1.8 V and wide temperature range. The LMV61x input common mode extends
200 mV beyond the supplies and the output can swing rail-to-rail unloaded and within 30 mV with 2-kΩ load at 1.8-V supply. The LMV61x achieves a gain bandwidth of 1.4 MHz while drawing 100-µA (typical) quiescent current.
The industrial-plus temperature range of −40°C to 125°C allows the LMV61x to accommodate a broad range of extended environment applications.
The LMV611 is offered in the tiny 5-pin SC70 package, the LMV612 in space-saving 8-pin VSSOP and SOIC packages, and the LMV614 in 14-pin TSSOP and SOIC packages. These small package amplifiers offer an ideal solution for applications requiring minimum PCB footprint. Applications with area constrained PCB requirements include portable and battery-operated electronics.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
LMV611 | SOT-23 (5) | 2.92 mm × 1.60 mm |
SC70 (5) | 2.00 mm × 1.25 mm | |
LMV612 | VSSOP (8) | 3.00 mm × 3.00 mm |
SOIC (8) | 4.90 mm × 3.91 mm | |
LMV614 | TSSOP (14) | 5.00 mm × 4.40 mm |
SOIC (14) | 8.64 mm × 3.90 mm |
Changes from C Revision (July 2016) to D Revision
Changes from B Revision (March 2013) to C Revision
Changes from A Revision (March 2012) to B Revision
PIN | TYPE(1) | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1 | +IN | I | Noninverting input |
2 | V– | P | Negative supply input |
3 | –IN | I | Inverting input |
4 | OUTPUT | O | Output |
5 | V+ | P | Positive supply input |
PIN | TYPE(1) | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1 | OUT A | O | Output A |
2 | –IN A | I | Inverting input A |
3 | +IN A | I | Noninverting input A |
4 | V– | P | Negative supply input |
5 | +IN B | I | Noninverting input B |
6 | –IN B | I | Inverting input B |
7 | OUT B | O | Output B |
8 | V+ | P | Positive supply input |
PIN | TYPE(1) | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1 | OUT A | O | Output A |
2 | IN A– | I | Inverting input A |
3 | IN A+ | I | Noninverting input A |
4 | V+ | P | Positive supply input |
5 | IN B+ | I | Noninverting input B |
6 | IN B– | I | Inverting input B |
7 | OUT B | O | Output B |
8 | OUT C | O | Output C |
9 | IN C– | I | Inverting input C |
10 | IN C+ | I | Noninverting input C |
11 | V– | P | Negative supply input |
12 | IN D+ | I | Noninverting input D |
13 | IN D– | I | Inverting input D |
14 | OUT D | O | Output D |
MIN | MAX | UNIT | |
---|---|---|---|
Differential input voltage | ±Supply voltage | ||
Supply voltage (V+–V −) | 6 | V | |
Voltage at input or output pin | V– – 0.3 | V++ 0.3 | V |
Junction temperature, TJMAX(4) | 150 | °C | |
Storage temperature, Tstg | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
Machine model (MM)(2) | ±200 |
MIN | MAX | UNIT | |
---|---|---|---|
Supply voltage | 1.8 | 5.5 | V |
Temperature | –40 | 125 | °C |
THERMAL METRIC(1) | LMV611 | LMV612 | LMV614 | UNIT | ||||
---|---|---|---|---|---|---|---|---|
DBV (SOT-23) |
DCK (SC70) |
D (SOIC) |
DGK (VSSOP) |
D (SOIC) |
PW (TSSOP) |
|||
5 PINS | 5 PINS | 8 PINS | 8 PINS | 14 PINS | 14 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 197.2 | 285.9 | 125.9 | 184.5 | 94.4 | 124.8 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 156.7 | 115.9 | 70.2 | 74.3 | 52.5 | 51.4 | °C/W |
RθJB | Junction-to-board thermal resistance | 55.6 | 63.7 | 66.5 | 105.1 | 48.9 | 67.2 | °C/W |
ψJT | Junction-to-top characterization parameter | 41.4 | 4.5 | 19.8 | 13.1 | 14.3 | 6.6 | °C/W |
ψJB | Junction-to-board characterization parameter | 55 | 62.9 | 65.9 | 103.6 | 48.6 | 66.6 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | — | — | — | — | — | — | °C/W |
PARAMETER | TEST CONDITIONS | MIN(2) | TYP(3) | MAX(2) | UNIT | ||
---|---|---|---|---|---|---|---|
VOS | Input offset voltage | LMV611 (single) | 1 | 4 | mV | ||
LMV612 (dual) and LMV614 (quad) |
1 | 5.5 | |||||
TCVOS | Input offset voltage average drift | 5.5 | µV/°C | ||||
IB | Input bias current | 15 | nA | ||||
IOS | Input offset current | 13 | nA | ||||
IS | Supply current (per channel) | 103 | 185 | µA | |||
CMRR | Common-mode rejection ratio | LMV611, 0 V ≤ VCM ≤ 0.6 V, 1.4 V ≤ VCM ≤ 1.8 V(4) |
60 | 78 | dB | ||
LMV612 and LMV614, 0 V ≤ VCM ≤ 0.6 V, 1.4 V ≤ VCM ≤ 1.8 V(4) |
55 | 76 | |||||
−0.2 V ≤ VCM ≤ 0 V, 1.8 V ≤ VCM ≤ 2 V |
50 | 72 | |||||
PSRR | Power supply rejection ratio | 1.8 V ≤ V+ ≤ 5 V | 100 | dB | |||
CMVR | Input common-mode voltage | For CMRR range ≥ 50 dB | V–, TA = 25°C | V– – 0.2 | –0.2 | V | |
V+, TA = 25°C | 2.1 | V+ + 0.2 | |||||
TA = −40°C to 85°C | V– | V+ | |||||
TA = 125°C | V– + 0.2 | V+ – 0.2 | |||||
AV | Large signal voltage gain LMV611 (single) |
RL = 600 Ω to 0.9 V, VO = 0.2 V to 1.6 V, VCM = 0.5 V |
77 | 101 | dB | ||
RL = 2 kΩ to 0.9 V, VO = 0.2 V to 1.6 V, VCM = 0.5 V |
80 | 105 | |||||
Large signal voltage gain LMV612 (dual) and LMV614 (quad) |
RL = 600 Ω to 0.9 V, VO = 0.2 V to 1.6 V, VCM = 0.5 V |
75 | 90 | ||||
RL = 2 kΩ to 0.9 V, VO = 0.2 V to 1.6 V, VCM = 0.5 V |
78 | 100 | |||||
VO | Output swing | RL = 600 Ω to 0.9 V | 1.65 | 1.72 | V | ||
VIN = ±100 mV | 0.077 | 0.105 | |||||
RL = 2 kΩ to 0.9 V | 1.75 | 1.77 | |||||
VIN = ±100 mV | 0.024 | 0.035 | |||||
IO | Output short-circuit current(5) | Sourcing, VO = 0 V, VIN = 100 mV |
8 | mA | |||
Sinking, VO = 1.8 V, VIN = –100 mV |
9 |
PARAMETER | TEST CONDITIONS | MIN(2) | TYP(3) | MAX(2) | UNIT | |
---|---|---|---|---|---|---|
SR | Slew rate(4) | 0.35 | V/µs | |||
GBW | Gain-bandwidth product | 1.4 | MHz | |||
Φm | Phase margin | 67 | ° | |||
Gm | Gain margin | 7 | dB | |||
en | Input-referred voltage noise | f = 10 kHz, VCM = 0.5 V | 60 | nV/√Hz | ||
in | Input-referred current noise | f = 10 kHz | 0.08 | pA/√Hz | ||
THD | Total harmonic distortion | f = 1 kHz, AV = +1, RL = 600 Ω, VIN = 1 VPP |
0.023% | |||
Amp-to-amp isolation(5) | 123 | dB |
PARAMETER | TEST CONDITIONS | MIN(2) | TYP(3) | MAX(2) | UNIT | ||
---|---|---|---|---|---|---|---|
VOS | Input offset voltage | LMV611 (single) | 1 | 4 | mV | ||
LMV612 (dual) and LMV614 (quad) |
1 | 5.5 | |||||
TCVOS | Input offset voltage average drift | 5.5 | µV/°C | ||||
IB | Input bias current | 15 | nA | ||||
IOS | Input offset current | 8 | nA | ||||
IS | Supply current (per channel) | 105 | 190 | µA | |||
CMRR | Common-mode rejection ratio | LMV611, 0 V ≤ VCM ≤ 1.5 V, 2.3 V ≤ VCM ≤ 2.7 V(4) |
60 | 81 | dB | ||
LMV612 and LMV614, 0 V ≤ VCM ≤ 1.5 V, 2.3 V ≤ VCM ≤ 2.7 V(4) |
55 | 80 | |||||
−0.2 V ≤ VCM ≤ 0 V, 2.7 V ≤ VCM ≤ 2.9 V |
50 | 74 | |||||
PSRR | Power supply rejection ratio | 1.8 V ≤ V+ ≤ 5 V, VCM = 0.5 V |
100 | dB | |||
VCM | Input common-mode voltage | For CMRR range ≥ 50 dB | V–,TA = 25°C | V– – 0.2 | –0.2 | V | |
V+,TA = 25°C | 3 | V+ + 0.2 | |||||
TA = –40°C to 85°C | V– | V+ | |||||
TA = 125°C | V– + 0.2 | V+ – 0.2 | |||||
AV | Large signal voltage gain LMV611 (single) |
RL = 600 Ω to 1.35 V, VO = 0.2 V to 2.5 V |
87 | 104 | dB | ||
RL = 2 kΩ to 1.35 V, VO = 0.2 V to 2.5 V |
92 | 110 | |||||
Large signal voltage gain LMV612 (dual) and LMV614 (quad) |
RL = 600 Ω to 1.35 V, VO = 0.2 V to 2.5 V |
78 | 90 | ||||
RL = 2 kΩ to 1.35 V, VO = 0.2 V to 2.5 V |
81 | 100 | |||||
VO | Output swing | RL = 600 Ω to 1.35 V | 2.55 | 2.62 | V | ||
VIN = ±100 mV | 0.083 | 0.11 | |||||
RL = 2 kΩ to 1.35 V | 2.65 | 2.675 | |||||
VIN = ±100 mV | 0.025 | 0.04 | |||||
IO | Output short-circuit current(5) | Sourcing, VO = 0 V, VIN = 100 mV |
30 | mA | |||
Sinking, VO = 0 V, VIN = –100 mV |
25 |
PARAMETER | TEST CONDITIONS | MIN(2) | TYP(3) | MAX(2) | UNIT | |
---|---|---|---|---|---|---|
SR | Slew rate(4) | 0.4 | V/µs | |||
GBW | Gain-bandwidth product | 1.4 | MHz | |||
Φm | Phase margin | 70 | ° | |||
Gm | Gain margin | 7.5 | dB | |||
en | Input-referred voltage noise | f = 10 kHz, VCM = 0.5 V | 57 | nV/√Hz | ||
in | Input-referred current noise | f = 10 kHz | 0.08 | pA/√Hz | ||
THD | Total harmonic distortion | f = 1 kHz, AV = +1, RL = 600 Ω, VIN = 1 VPP |
0.022% | |||
Amp-to-amp isolation(5) | 123 | dB |
PARAMETER | TEST CONDITIONS | MIN(2) | TYP(3) | MAX(2) | UNIT | ||
---|---|---|---|---|---|---|---|
VOS | Input offset voltage | LMV611 (single) | 1 | 4 | mV | ||
LMV612 (dual) and LMV614 (quad) |
1 | 5.5 | |||||
TCVOS | Input offset voltage average drift | 5.5 | µV/°C | ||||
IB | Input bias current | 14 | 35 | nA | |||
IOS | Input offset current | 9 | nA | ||||
IS | Supply current (per channel) | 116 | 210 | µA | |||
CMRR | Common-mode rejection ratio | 0 V ≤ VCM ≤ 3.8 V, 4.6 V ≤ VCM ≤ 5 V(4) |
60 | 86 | dB | ||
–0.2 V ≤ VCM ≤ 0 V 5 V ≤ VCM ≤ 5.2 V |
50 | 78 | |||||
PSRR | Power supply rejection ratio | 1.8 V ≤ V+ ≤ 5 V, VCM = 0.5 V |
100 | dB | |||
CMVR | Input common-mode voltage | For CMRR range ≥ 50 dB | V–, TA = 25°C | V– – 0.2 | –0.2 | V | |
V+, TA = 25°C | 5.3 | V+ + 0.2 | |||||
TA = –40°C to 85°C | V– | V+ | |||||
TA = 125°C | V– + 0.3 | V+ – 0.3 | |||||
AV | Large signal voltage gain LMV611 (single) |
RL = 600 Ω to 2.5 V, VO = 0.2 V to 4.8 V |
88 | 102 | dB | ||
RL = 2 kΩ to 2.5 V, VO = 0.2 V to 4.8 V |
94 | 113 | |||||
Large signal voltage gain LMV612 (dual) and LMV614 (quad) |
RL = 600 Ω to 2.5 V, VO = 0.2 V to 4.8 V |
81 | 90 | ||||
RL = 2 kΩ to 2.5 V, VO = 0.2 V to 4.8 V |
85 | 100 | |||||
VO | Output swing | RL = 600 Ω to 2.5 V | 4.855 | 4.89 | V | ||
VIN = ±100 mV | 0.12 | 0.16 | |||||
RL = 2 kΩ to 2.5 V | 4.945 | 4.967 | |||||
VIN = ±100 mV | 0.037 | 0.065 | |||||
IO | Output short-circuit current(5) | LMV611, Sourcing, VO = 0 V, VIN = 100 mV |
100 | mA | |||
Sinking, VO = 5 V, VIN = –100 mV |
65 |
PARAMETER | TEST CONDITIONS | MIN(2) | TYP(3) | MAX(2) | UNIT | |
---|---|---|---|---|---|---|
SR | Slew rate(4) | 0.42 | V/µs | |||
GBW | Gain-bandwidth product | 1.5 | MHz | |||
Φm | Phase margin | 71 | ° | |||
Gm | Gain margin | 8 | dB | |||
en | Input-referred voltage noise | f = 10 kHz, VCM = 1 V | 50 | nV/√Hz | ||
in | Input-referred current noise | f = 10 kHz | 0.08 | pA/√Hz | ||
THD | Total harmonic distortion | f = 1 kHz, AV = +1, RL = 600 Ω, VO = 1 V PP |
0.022% | |||
Amp-to-amp isolation(5) | 123 | dB |
The LMV61x devices achieve a gain bandwidth of 1.4 MHz while drawing 100-µA (typical) quiescent current. They also provide a rail-to-rail input with a maximum input offset voltage of 4 mV. Lastly, the LMV61x input common mode extends 200 mV beyond the supplies and the output can swing rail-to-rail unloaded and within
30 mV with 2-kΩ load at 1.8-V supply.
The rail-to-rail input stage of this family provides more flexibility for the designer. The LMV61x use a complimentary PNP and NPN input stage in which the PNP stage senses common-mode voltage near V− and the NPN stage senses common-mode voltage near V+. The transition from the PNP stage to NPN stage occurs
1 V below V+. Because both input stages have their own offset voltage, the offset of the amplifier becomes a function of the input common-mode voltage and has a crossover point at 1 V below V+.
This VOS crossover point can create problems for both DC- and AC-coupled signals if proper care is not taken. Large input signals that include the VOS crossover point causes distortion in the output signal. One way to avoid such distortion is to keep the signal away from the crossover. For example, in a unity-gain buffer configuration and with VS = 5 V, a 5-V peak-to-peak signal contains input-crossover distortion while a 3-V peak-to-peak signal centered at 1.5 V does not contain input-crossover distortion as it avoids the crossover point. Another way to avoid large signal distortion is to use a gain of −1 circuit which avoids any voltage excursions at the input terminals of the amplifier. In that circuit, the common-mode DC voltage can be set at a level away from the VOS crossover point. For small signals, this transition in VOS shows up as a VCM dependent spurious signal in series with the input signal and can effectively degrade small signal parameters such as gain and common-mode rejection ratio. To resolve this problem, the small signal must be placed such that it avoids the VOS crossover point. In addition to the rail-to-rail performance, the output stage can provide enough output current to
drive 600-Ω loads. Because of the high current capability, take care to not exceed the 150°C maximum junction temperature specification.
The LMV61x family has a complementary bipolar input stage. The typical input bias current (IB) is 15 nA. The input bias current can develop a significant offset voltage. This offset is primarily due to IB flowing through the negative feedback resistor, RF. For example, if IB is 50 nA and RF is 100 kΩ, then an offset voltage of 5 mV develops (VOS = IB × RF). Using a compensation resistor (RC), as shown in Figure 29, cancels this effect. But the input offset current (IOS) still contributes to an offset voltage in the same manner.
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The LMV61x devices bring performance, economy, and ease-of-use to low-voltage, low-power systems. They provide rail-to-rail input and rail-to-rail output swings into heavy loads.
Because the LMV61x input common-mode range includes both positive and negative supply rails and the output can also swing to either supply, achieving half-wave rectifier functions in either direction is an easy task. All that is needed are two external resistors; there is no need for diodes or matched resistors. The half wave rectifier can have either positive or negative going outputs, depending on the way the circuit is arranged.
In Figure 30 the circuit is referenced to ground, while in Figure 31 the circuit is biased to the positive supply. These configurations implement the half-wave rectifier because the LMV61x can not respond to one-half of the incoming waveform. It can not respond to one-half of the incoming because the amplifier can not swing the output beyond either rail. Therefore, the output disengages during this half cycle. During the other half cycle, however, the amplifier achieves a half wave that can have a peak equal to the total supply voltage. RI must be large enough not to load the LMV61x.
Some manufactures make rail-to-rail op amps out of op amps that are otherwise non-rail-to-rail by using a resistive divider on the inputs. The resistors divide the input voltage to get a rail-to-rail input range. The problem with this method is that it also divides the signal, so to get the obtained gain, the amplifier must have a higher closed-loop gain. This raises the noise and drift by the internal gain factor and lowers the input impedance. Any mismatch in these precision resistors reduces the CMRR, as well. The LMV61x is rail-to-rail and therefore doesn’t have these disadvantages.
Using three of the LMV61x amplifiers, an instrumentation amplifier with rail-to-rail inputs and outputs can be made as shown in Figure 32.
In this example, amplifiers on the left side act as buffers to the differential stage. These buffers assure that the input impedance is very high and require no precision matched resistors in the input stage. They also assure that the difference amp is driven from a voltage source. This is necessary to maintain the CMRR set by the matching R1-R2 with R3-R4. The gain is set by the ratio of R2/R1 and R3 must equal R1 and R4 equal R2. With both rail-to-rail input and output ranges, the input and output are only limited by the supply voltages. Remember that even with rail-to-rail outputs, the output can not swing past the supplies so the combined common-mode voltages plus the signal must not be greater that the supplies or limiting occurs.
The high-side, current-sensing circuit (Figure 33) is commonly used in a battery charger to monitor charging current to prevent overcharging. A sense resistor RSENSE is connected to the battery directly. This system requires an op amp with rail-to-rail input. The LMV61x are ideal for this application because its common-mode input range goes up to the rail.
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As seen in (Figure 33), the ICHARGE current flowing through sense resistor RSENSE develops a voltage drop equal to VSENSE. The voltage at the negative sense point is now less than the positive sense point by an amount proportional to the VSENSE voltage.
The low-bias currents of the LMV61x cause little voltage drop through R2, so the negative input of the LMV61x amplifier is at essentially the same potential as the negative sense input.
The LMV61x detects this voltage error between its inputs and servo the transistor base to conduct more current through Q1, increasing the voltage drop across R1 until the LMV61x inverting input matches the noninverting input. At this point, the voltage drop across R1 now matches VSENSE.
IG, a current proportional to ICHARGE, flows according to Equation 1.
IG also flows through the gain resistor R3 developing a voltage drop equal to Equation 2.
where
The other channel of the LMV61x may be used to buffer the voltage across R3 to drive the following stages.
For proper operation, the power supplies must be properly decoupled. For decoupling the supply lines, TI recommends that 10-nF capacitors be placed as close as possible to the op amp power supply pins. For single-supply, place a capacitor between V+ and V– supply leads. For dual supplies, place one capacitor between V+ and ground, and one capacitor between V– and ground.