7.4.1 Frequency and Phase Response Considerations

The relationship between open-loop frequency response and open-loop phase response determines the closed-loop stability performance (negative feedback). The open-loop phase response causes the feedback signal to shift towards becoming positive feedback, thus becoming unstable. The further the output phase angle is from the input phase angle, the more stable the negative feedback will operate. Phase Margin (φ_m) specifies this output-to-input phase relationship at the unity-gain crossover point. Zero degrees of phase-margin means that the input and output are completely in phase with each other and will sustain oscillation at the unity-gain frequency.

The AC tables show φ_m for a no load condition. But φ_m changes with load. The Gain and Phase margin vs Frequency plots in the curve section can be used to graphically determine the φ_m for various loaded conditions. To do this, examine the phase angle portion of the plot, find the phase margin point at the unity-gain frequency, and determine how far this point is from zero degree of phase-margin. The larger the phase-margin, the more stable the circuit operation.

The bandwidth is also affected by load. The graphs of Figure 33 and Figure 34 provide a quick look at how various loads affect the φ_m and the bandwidth of the LMV821/822/824 family. These graphs show capacitive loads reducing both φ_m and bandwidth, while resistive loads reduce the bandwidth but increase the φ_m. Notice how a 600Ω resistor can be added in parallel with 220 picofarads capacitance, to increase the φ_m 20°(approx.), but at the price of about a 100 kHz of bandwidth.

Overall, the LMV821/822/824 family provides good stability for loaded condition.

Figure 33. Phase Margin vs Common Mode Voltage for Various Loads

Figure 34. Unity-Gain Frequency vs Common Mode Voltage for Various Loads

7.4.2 Unity Gain Pulse Response Consideration

A pull-up resistor is well suited for increasing unity-gain, pulse response stability. For example, a 600 Ω pull-up resistor reduces the overshoot voltage by about 50%, when driving a 220 pF load. Figure 35 shows how to implement the pull-up resistor for more pulse response stability.

Figure 35. Using a Pull-up Resistor at the Output for Stabilizing Capacitive Loads

Higher capacitances can be driven by decreasing the value of the pull-up resistor, but its value shouldn't be reduced beyond the sinking capability of the part. An alternate approach is to use an isolation resistor as illustrated in Figure 36.

Figure 37 shows the resulting pulse response from a LMV824, while driving a 10,000 pF load through a 20Ω isolation resistor.

Figure 36. Using an Isolation Resistor to Drive Heavy Capacitive Loads

Figure 37. Pulse Response per Figure 36

7.4.3 Input Bias Current Consideration

Input bias current (I_B) can develop a somewhat significant offset voltage. This offset is primarily due to I_B flowing through the negative feedback resistor, R_F. For example, if I_B is 90 nA (max @ room) and R_F is 100 kΩ, then an offset of 9 mV will be developed (V_OS= I_B x R_F).Using a compensation resistor (R_C), as shown in Figure 38, cancels out this affect. But the input offset current (I_OS) will still contribute to an offset voltage in the same manner - typically 0.05 mV at room temp.

Figure 38. Canceling the Voltage Offset Effect of Input Bias Current