SNOS976M November   2001  – September 2016 LMV981-N , LMV982-N

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics - DC, 1.8 V
    6. 7.6  Electrical Characteristics - AC, 1.8 V
    7. 7.7  Electrical Characteristics - DC, 2.7 V
    8. 7.8  Electrical Characteristics - AC, 2.7 V
    9. 7.9  Electrical Characteristics - DC, 5 V
    10. 7.10 Electrical Characteristics - AC, 5 V
    11. 7.11 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Input and Output Stage
      2. 8.4.2 Shutdown Mode
      3. 8.4.3 Input Bias Current Consideration
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 High-Side Current-Sensing Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Half-Wave Rectifier Applications
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
      3. 9.2.3 Instrumentation Amplifier With Rail-to-Rail Input and Output Application
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
        3. 9.2.3.3 Application Curve
    3. 9.3 Do's and Don'ts
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Layout

11.1 Layout Guidelines

The V+ pin must be bypassed to ground with a low-ESR capacitor.

The optimum placement is closest to the V+ and ground pins.

Take care to minimize the loop area formed by the bypass capacitor connection between V+ and ground.

The ground pin must be connected to the PCB ground plane at the pin of the device.

The feedback components must be placed as close to the device as possible minimizing strays.

11.2 Layout Example

LMV981-N LMV982-N Southeast_SOT_wSD_Example.png Figure 38. SOT-23 Layout Example