SNOS976M November 2001 – September 2016 LMV981-N , LMV982-N
PRODUCTION DATA.
The V+ pin must be bypassed to ground with a low-ESR capacitor.
The optimum placement is closest to the V+ and ground pins.
Take care to minimize the loop area formed by the bypass capacitor connection between V+ and ground.
The ground pin must be connected to the PCB ground plane at the pin of the device.
The feedback components must be placed as close to the device as possible minimizing strays.