SNAS866A
December 2023 – September 2024
LMX1214
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Timing Requirements
5.7
Timing Diagram
5.8
Typical Characteristics
6
Detailed Description
6.1
Overview
6.1.1
Range of Dividers
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Power-On Reset
6.3.2
Temperature Sensor
6.3.3
Clock Outputs
6.3.3.1
Clock Output Buffers
6.3.3.2
Clock MUX
6.3.3.3
Clock Divider
6.3.4
AUXCLK Output
6.3.4.1
AUXCLKOUT Output Format
6.3.4.2
AUXCLK_DIV_PRE and AUXCLK_DIV Dividers
6.3.5
SYNC Input Pins
6.3.5.1
SYNC Pins Common-Mode Voltage
6.3.5.2
Windowing Feature
6.4
Device Functional Modes Configurations
6.4.1
Pin Mode Control
7
Register Map
7.1
Device Registers
8
Application and Implementation
8.1
Application Information
8.1.1
SYNC Input Configuration
8.1.2
Treatment of Unused Pins
8.1.3
Current Consumption
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.3
Application Plots
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Device Support
9.2
Documentation Support
9.2.1
Related Documentation
9.3
Receiving Notification of Documentation Updates
9.4
Support Resources
9.5
Trademarks
9.6
Electrostatic Discharge Caution
9.7
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
11.1
Tape and Reel Information
Package Options
Mechanical Data (Package|Pins)
RHA|40
MPQF135D
Thermal pad, mechanical data (Package|Pins)
RHA|40
QFND650
Orderable Information
SNAS866A_pm
snas866a_oa
9
Device and Documentation Support