SNAS866A December   2023  – September 2024 LMX1214

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Timing Diagram
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
      1. 6.1.1 Range of Dividers
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Power-On Reset
      2. 6.3.2 Temperature Sensor
      3. 6.3.3 Clock Outputs
        1. 6.3.3.1 Clock Output Buffers
        2. 6.3.3.2 Clock MUX
        3. 6.3.3.3 Clock Divider
      4. 6.3.4 AUXCLK Output
        1. 6.3.4.1 AUXCLKOUT Output Format
        2. 6.3.4.2 AUXCLK_DIV_PRE and AUXCLK_DIV Dividers
      5. 6.3.5 SYNC Input Pins
        1. 6.3.5.1 SYNC Pins Common-Mode Voltage
        2. 6.3.5.2 Windowing Feature
    4. 6.4 Device Functional Modes Configurations
      1. 6.4.1 Pin Mode Control
  8. 7 Register Map
    1. 7.1 Device Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 SYNC Input Configuration
      2. 8.1.2 Treatment of Unused Pins
      3. 8.1.3 Current Consumption
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Plots
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.1.2 Treatment of Unused Pins

In many cases, not all pins are used. Table 8-1 lists the recommendations on how to handle these unused pins.

Table 8-1 Treatment of Unused or Partially Used Pins
PINS TREATMENT
All VCC Pins These pins must always be connected to the power supply. If the block that powers these VCC pins (as implied by the pin name) is not used, then the bypassing can be minimized or eliminated.
SYNC_P / SYNC_N
  1. If driving single-ended input, the complementary input must terminates based on Section 8.1.1
  2. If the SYNC pins are unused,tie the pins to the VCC with 1-kΩ resistor.
CLKIN_P / CLKIN_N If driving single-ended input, the complementary input must have an AC-coupling capacitor and 50 Ω to ground.
CLKOUTx_P / CLKOUTx_N If not used, connect a AC-coupling capacitor and 50 Ω to ground.
AUXCLKOUT_P / AUXCLKOUT_N If these pins are unused, connect the pins to ground with a 1-kΩ resistor.
CLKx_EN
  1. If operating device in SPI controlled mode, these pins must tied to VCC with 1-kΩ resistor.
  2. If the respective output channels are not using. the pins must connect to ground with 1-kΩ resistor.
MUXSEL, DIVSELx If these pins are unused, connect these pins to ground with a 1-kΩ resistor.