SNAS851 December 2023 LMX1906-SP
PRODUCTION DATA
The current consumption varies as a function of the setup condition. By adding up all the block currents shown in Table 7-2, users can obtain reasonable estimate of the current for any setup condition.
BLOCK | CONDITION (s) | CURRENT (mA) | ||
---|---|---|---|---|
Device Core | CLK_MUX = Buffer Mode | 294 | ||
CLK_MUX = Divide Mode | 260 | |||
CLK_MUX = Multiply Mode | SMCLK_EN=0 | 540 | ||
SMCLK_EN=1 | 560 | |||
SYSREF SYNC Windowing |
Core | SYSREF_EN=1 | 80 | |
Delay Generator | Generator Mode (SYSREF_MODE=0,1) | 53 | ||
Repeater Mode (SYSREF_MODE=2) | 40 | |||
Windowing Circuitry | Windowing Circuitry (CLKPOS_CAPTURE_EN=1) |
SYSREF_MODE=0,1 | 113 | |
SYSREF_MODE=2 | 0 | |||
SYSREF Pulser | SYSREF_MODE=1 | 7 | ||
CLKOUT (Per active clock channel) |
Core | SYSREF_EN=0 | 25 | |
SYSREF_EN = 1 | Delay Not Used | 30 | ||
Delay Used | 40 | |||
Output Buffer | CHx_EN = CLKOUTx_EN=1 | 4+6*CLKOUTx_PWR | ||
SYSREFOUT | Core | SYSREFOUT_EN = CHx_EN = 1 | 74 + SYSREFOUTx_PWR*5 | |
Output Buffer | SYSREFOUT_EN =
CHx_EN = 1 (SYSREFOUTx_PWR and SYSREFOUTx_VCM can interact which would make the output buffer current lower than the formula predicts in some cases) |
2*SYSREFOUTx_PWR + 2*SYSREFOUTx_VCM | ||
LOGICLKOUT | Core | LOGIC_EN=1LOGICLKOUT_EN=1 | SYSREF_EN=0 | 49 |
SYSREF_EN=1 | 59 | |||
Output Buffer | CML(RP=50Ω) | 16+1*LOGICLKOUT_PWR | ||
LVDS | 12 | |||
LOGISYSREFOUT | Core | LOGIC_EN=1 LOGISYSREFOUT_EN=1 |
SYSREF_EN=0 | 0 |
SYSREF_EN=1 | 55 | |||
Output Buffer | LOGIC_EN=1 LOGISYSREFOUT_EN=1 |
CML(RP=50Ω) | 16+1*LOGICLKOUT_PWR | |
LVDS | 12 |