SNAS851 December 2023 LMX1906-SP
PRODUCTION DATA
For optimal phase noise, the VCO in the multiplier divides up the frequency range into many different bands and cores and has optimized amplitude settings for each one of these. For this reason, upon initial use or whenever the frequency is changed, the user must run a calibration routine to determine the correct core, frequency band, and amplitude setting. Program the R0 register with a valid input signal to perform a calibration. To ensure reliable multiplier calibration, the state machine clock frequency must be at least twice the SPI write speed, but no more than 30 MHz. Whenever the CLK_MUX mode is changed or the multiplier is calibrated for the first time, the calibration time will be substantially longer, on the order of 5 ms.