SNAS187D February   2003  – January 2016 LMX2430 , LMX2433 , LMX2434

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description continued
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Recommended Operating Conditions
    3. 7.3 Thermal Information
    4. 7.4 Electrical Characteristics
    5. 7.5 Timing Requirements
    6. 7.6 Typical Characteristics
      1. 7.6.1 Sensitivity
      2. 7.6.2 Charge Pump
      3. 7.6.3 Input Impedance
  8. 8 Parameter Measurement Information
    1. 8.1 Bench Test Setups
      1. 8.1.1 LMX243x Charge-Pump Test Setup
      2. 8.1.2 Charge-Pump Current Specification Definitions
        1. 8.1.2.1 Charge-Pump Output Current Variation vs Charge-Pump Output Voltage
        2. 8.1.2.2 Charge-Pump Sink Current vs Charge-Pump Output Source Current Mismatch
        3. 8.1.2.3 Charge-Pump Output Current Variation vs Temperature
      3. 8.1.3 LMX243x FinRF Sensitivity Test Setup
      4. 8.1.4 LMX243x OSCin Sensitivity Test Setup
      5. 8.1.5 LMX243x FinRF Input Impedance Test Setup
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Reference Oscillator Input
      2. 9.3.2  Reference Dividers (R Counters)
      3. 9.3.3  Prescalers
      4. 9.3.4  Programmable Feedback Dividers (N Counters)
      5. 9.3.5  Phase / Frequency Detectors
        1. 9.3.5.1 Phase Comparator and Internal Charge-Pump Characteristics
      6. 9.3.6  Charge Pumps
      7. 9.3.7  Microwire Serial Interface
      8. 9.3.8  Multi-Function Outputs
        1. 9.3.8.1 Push-Pull Analog Lock-Detect Output
        2. 9.3.8.2 Open-Drain Analog Lock-Detect Output
        3. 9.3.8.3 Digital Filtered Lock-Detect Output
        4. 9.3.8.4 Reference Divider and Feedback Divider Output
      9. 9.3.9  Fastlock Output
      10. 9.3.10 Counter Reset
    4. 9.4 Device Functional Modes
      1. 9.4.1 Power Control
        1. 9.4.1.1 Synchronous Power-Down Mode
        2. 9.4.1.2 Asynchronous Power-Down Mode
    5. 9.5 Programming
      1. 9.5.1 Microwire Interface
      2. 9.5.2 Control Register Location
    6. 9.6 Register Maps
      1. 9.6.1 Control Register Content Map
      2. 9.6.2 R0 Register
        1. 9.6.2.1 RF_R[14:0] - RF Synthesizer Programmable Reference Divider (R Counter) (R0[17:3])
        2. 9.6.2.2 RF_CPP - RF Synthesizer Phase Detector Polarity (R0[18])
        3. 9.6.2.3 RF_CPG - RF Synthesizer Charge-Pump Current Gain (R0[19])
        4. 9.6.2.4 RF_CPT - RF Synthesizer Charge-Pump Tri-State (R0[20])
        5. 9.6.2.5 RF_RST - RF Synthesizer Counter Reset (R0[21])
      3. 9.6.3 R1 Register
        1. 9.6.3.1 LMX243x RF Synthesizer Swallow Counter
          1. 9.6.3.1.1 RF_A[3:0] - LMX2430/33 RF Synthesizer Swallow Counter (A Counter) (R1[6:3])
          2. 9.6.3.1.2 RF_A[4:0] - LMX2434 RF Synthesizer Swallow Counter (A Counter) (R1[7:3])
        2. 9.6.3.2 LMX243x RF Synthesizer Programmable Binary Counter
          1. 9.6.3.2.1 RF_B[14:0] - LMX2430/33 RF Synthesizer Programmable Binary Counter (B Counter) (R1[21:7])
          2. 9.6.3.2.2 RF_B[13:0] - LMX2434 RF Synthesizer Programmable Binary Counter (B Counter) (R1[21:8])
        3. 9.6.3.3 LMX243x RF Synthesizer Prescaler Select
          1. 9.6.3.3.1 RF_P - LMX2430/33 RF Synthesizer Prescaler Select (R1[22])
          2. 9.6.3.3.2 RF_P - LMX2434 RF Synthesizer Prescaler Select (R1[22])
        4. 9.6.3.4 RF_PD - RF Synthesizer Power Down (R1[23])
      4. 9.6.4 R2 Register
        1. 9.6.4.1 RF_TOC[0:11] - RF Synthesizer Time-Out Counter (R2[14:3])
        2. 9.6.4.2 R3 Register
          1. 9.6.4.2.1 IF_R[14:0] - IF Synthesizer Programmable Reference Divider (R Counter) (R3[17:3])
          2. 9.6.4.2.2 IF_CPP - IF Synthesizer Phase Detector Polarity (R3[18])
          3. 9.6.4.2.3 IF_CPG - IF Synthesizer Charge-Pump Current Gain (R3[19])
          4. 9.6.4.2.4 IF_CPT - IF Synthesizer Charge-Pump Tri-State (R3[20])
          5. 9.6.4.2.5 IF_RST - IF Synthesizer Counter Reset (R3[21])
      5. 9.6.5 R4 Register
        1. 9.6.5.1 IF_A[3:0] - IF Synthesizer Swallow Counter (A Counter) (R4[6:3])
        2. 9.6.5.2 IF_B[13:0] - IF Synthesizer Programmable Binary Counter (B Counter) (R4[20:7])
          1. 9.6.5.2.1 IF_P - IF Synthesizer Prescaler Select (R4[22])
        3. 9.6.5.3 IF_PD - IF Synthesizer Power Down (R4[23])
      6. 9.6.6 R5 Register
        1. 9.6.6.1 IF_TOC[0:11] - IF Synthesizer Time-Out Counter (R5[14:3])
      7. 9.6.7 MUX[3:0] - Multifunction Output Select (R3[23:22]:R0[23:22])
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Device Nomenclature
        1. 13.1.1.1 List of Definitions
    2. 13.2 Related Links
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Specifications

7.1 Absolute Maximum Ratings

See (1)(2)(3)(4)
MIN MAX UNIT
Power supply voltage
VCC to GND		 −0.3 3.25 V
VI Voltage on any pin to GND
VI must be < +3.25 V		 −0.3 VCC + 0.3 V
TL Lead temperature (solder 4 seconds) 260 °C
Tstg Storage temperature −65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) This device is a high-performance RF integrated circuit with an ESD rating < 2000 V and is ESD-sensitive. Handling and assembly of this device must be done at ESD-protected work stations.
(3) GND = 0 V.
(4) If Military/Aerospace specified devices are required, contact the Texas Instruments Sales Office/Distributors for availability and specifications.

7.2 Recommended Operating Conditions

MIN MAX UNIT
Power supply voltage Vcc to GND 2.25 2.75 V
Operating temperature, TA −40 85 °C

7.3 Thermal Information

THERMAL METRIC(1) LMX243x UNIT
NPE (ULGA) PW (TSSOP)
20 PINS 20 PINS
RθJA Junction-to-ambient thermal resistance 80.9 111.5 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 22.5 44.9 °C/W
RθJB Junction-to-board thermal resistance 40 63.5 °C/W
ψJT Junction-to-top characterization parameter 0.2 6.1 °C/W
ψJB Junction-to-board characterization parameter 40 62.8 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

7.4 Electrical Characteristics

VCC = EN = 2.5 V, −40°C ≤ TA ≤ +85°C, unless otherwise specified
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ICC PARAMETERS
ICCRF Power supply current, RF
synthesizer		 LMX2430 CLK, DATA and LE = 0 V
OSCin = GND
RF_PD Bit = 0
IF_PD Bit = 1
RF_P Bit = 0		 2.8 3.6 mA
LMX2433 3.2 4.4 mA
LMX2434 4.6 6.2 mA
ICCIF Power supply current, IF
synthesizer 		LMX2430 CLK, DATA and LE = 0 V
OSCin = GND
RF_PD Bit = 1
IF_PD Bit = 0
IF_P Bit = 0		 1.4 2 mA
LMX2433 2 2.8 mA
LMX2434 2.4 3.5 mA
ICCPD Power-down current EN, ENosc, CLK, DATA
and LE = 0 V		 10 μA
RF SYNTHESIZER PARAMETERS
fFinRF RF operating
frequency		 LMX2430 RF_P Bit = 0 250 2500 MHz
RF_P Bit = 1 250 3000 MHz
LMX2433 RF_P Bit = 0 500 3000 MHz
RF_P Bit = 1 500 3600 MHz
LMX2434 RF_P Bit = 0 or 1 1000 5000 MHz
NRF N divider range P = 8 / 9(1) 24 262,151
P = 16 / 17(1) 48 524,287
P = 32 / 33(1) 96 524,287
RRF RF R divider range 3 32,767
fCOMPRF RF phase detector frequency 10 MHz
pFinRF RF input sensitivity LMX2430 / 33
2.25 V ≤ VCC ≤ 2.75 V(2)		 −15 0 dBm
LMX2434
2.35 V ≤ VCC ≤ 2.75 V(2)		 −12 0 dBm
ICPoutRF
Source		 RF charge-pump output source current VCPoutRF = VCC / 2
RF_CPG Bit = 0(3)		 –1 mA
VCPoutRF = VCC / 2
RF_CPG Bit = 1(3)		 –4 mA
ICPoutRF
Sink		 RF charge-pump output sink current VCPoutRF = VCC / 2
RF_CPG Bit = 0(3)		 1 mA
VCPoutRF = VCC / 2
RF_CPG Bit = 1(3)		 4 mA
ICPoutRF
TRI		 RF charge-pump output tri-state current 0.5 V ≤ VCPoutRF ≤ VCC – 0.5 V(3) –2.5 2.5 nA
ICPoutRF
%MIS		 RF charge-pump output sink current vs charge-pump output source current mismatch VCPoutRF = VCC / 2(4) 3% 10%
ICPoutRF
%VCPoutRF		 RF charge-pump output current magnitude variation vs charge-pump output voltage 0.5 V ≤ VCPoutRF ≤ VCC – 0.5 V(4) 5% 15%
ICPoutRF
%TA		 RF charge-pump output current magnitude variation vs temperature VCPoutRF = VCC / 2(4) 2%
IF SYNTHESIZER PARAMETERS
fFinIF IF operating frequency LMX2430 IF_P Bit = 0 or 1 100 800 MHz
LMX2433 IF_P Bit = 0 or 1 250 1700 MHz
LMX2434 IF_P Bit = 0 or 1 500 2500 MHz
NIF IF N divider range P = 8/9(1) 24 131,079
P = 16/17(1) 48 262,143
RIF IF R divider range 3 32,767
fCOMPIF IF phase detector frequency 10 MHz
pFinIF IF input sensitivity 2.25 V ≤ VCC ≤ 2.75 V(2) –15 0 dBm
ICPoutIF
Source		 IF charge-pump output source current VCPoutIF = VCC/2
IF_CPG Bit = 0(3)		 –1 mA
VCPoutIF = VCC/2
IF_CPG Bit = 1(3)		 –4 mA
ICPoutIF
Sink		 IF charge-pump output sink current VCPoutIF = VCC/2
IF_CPG Bit = 0(3)		 1 mA
VCPoutIF = VCC/2
IF_CPG Bit = 1(3)		 4 mA
ICPoutIF
TRI		 IF charge-pump output tri-state current 0.5 V ≤ VCPoutIF ≤ VCC – 0.5 V(3) –2.5 2.5 nA
ICPoutIF
%MIS		 IF charge-pump output sink current vs charge-pump output source current mismatch VCPoutIF = VCC/2(4) 3% 10%
ICPoutIF
%VCPoutIF		 IF charge-pump output current magnitude variation vs charge-pump output voltage 0.5 V ≤ VCPoutIF ≤ VCC – 0.5 V(4) 5% 15%
ICPoutIF
%TA		 IF charge-pump output current magnitude variation vs temperature VCPoutIF = VCC/2(4) 2%
OSCILLATOR PARAMETERS
fOSCin Oscillator operating frequency 1 256 MHz
vOSCin Oscillator sensitivity See (5) 0.5 VCC VPP
IOSCin Oscillator input current VOSCin = VCC 100 µA
VOSCin = 0 V –100 µA
DIGITAL INTERFACE (DATA, CLK, LE, EN, ENosc, Ftest/LD, FLoutRF, OSCout/ FLoutIF)
VIH High-level input voltage 1.6 V
VIL Low-level input voltage 0.4 V
IIH High-level input current VIH = VCC 1 μA
IIL Low-level input current VIL = 0 V −1 μA
VOH High-level output voltage IOH = −500 μA VCC − 0.4 V
VOL Low-level output voltage IOL = 500 μA 0.4 V
PHASE NOISE CHARACTERISTICS
LNRF(f) RF synthesizer normalized phase noise contribution(7) TCXO Reference Source
RF_CPG Bit = 1
IF_PD Bit = 1		 –219 dBc/ Hz
LNIF(f) IF synthesizer normalized phase noise contribution(7) TCXO Reference Source
IF_CPG Bit = 1
RF_PD Bit = 1		 –214 dBc/ Hz
LRF(f) RF synthesizer single-side band phase noise measured LMX2430 fFinRF = 2750 MHz
f = 10-kHz offset
fCOMPRF = 1 MHz
Loop Bandwidth = 100 kHz
NRF = 2750
fOSCin = 10 MHz
vOSCin = 1 VPP
RF_CPG Bit = 1
IF_PD Bit = 1
TA = 25oC(8)		 –90.3 dBc/ Hz
LMX2433 fFinRF = 3200 MHz
f = 10-kHz offset

fCOMPRF = 1 MHz
Loop Bandwidth = 100 kHz
NRF = 3200
fOSCin = 10 MHz
vOSCin = 1 VPP
RF_CPG Bit = 1
IF_PD Bit = 1
TA = 25°C(8)		 –88.9 dBc/ Hz
LMX2434 fFinRF = 4700 MHz
f = 10-kHz offset

fCOMPRF = 1 MHz
Loop Bandwidth = 100 kHz
NRF = 4700
fOSCin = 10 MHz
vOSCin = 1 VPP
RF_CPG Bit = 1
IF_PD Bit = 1
TA = 25°C(8)		 –85.6 dBc/ Hz
(1) Some of the values in this range are illegal divide ratios (B < A). To obtain continuous legal division, the Minimum Divide Ratio must be calculated. Use N ≥ P * (P−1), where P is the value of the prescaler selected.
(4) Refer to Charge Pump Current Specification Definitions for details on how these measurements are made.
(7) Normalized Phase Noise Contribution is defined as LN(f) = L(f) − 20 log (N) − 10 log (fCOMP), where L(f) is defined as the single side band phase noise measured at an offset frequency, f, in a 1-Hz bandwidth. The offset frequency, f, must be chosen sufficiently smaller than the loop bandwidth of the PLL, yet large enough to avoid substantial phase noise contribution from the reference source. N is the value selected for the feedback divider and fCOMP is the RF/IF phase and frequency detector comparison frequency.
(8) The synthesizer phase noise is measured with the LMX2430PW/LMX2430NPE evaluation boards and the HP8566B Spectrum Analyzer.

7.5 Timing Requirements

See (6)
MIN NOM MAX UNIT
MICROWIRE INTERFACE
tCS DATA to CLK set-up time 50 ns
tCH DATA to CLK hold time 10 ns
tCWH CLK pulse width HIGH 50 ns
tCWL CLK pulse width LOW 50 ns
tES CLK to LE set-up time 50 ns
tEW LE pulse width 50 ns

7.6 Typical Characteristics

7.6.1 Sensitivity

LMX2430 LMX2433 LMX2434 20053592.png
VCC = EN = 2.25 V
Figure 1. LMX2430 FinRF Input Power vs Frequency
LMX2430 LMX2433 LMX2434 20053594.png
VCC = EN = 2.25 V
Figure 3. LMX2433 FinRF Input Power vs Frequency
LMX2430 LMX2433 LMX2434 20053596.png
VCC = EN = 2.35 V
Figure 5. LMX2434 FinRF Input Power vs Frequency
LMX2430 LMX2433 LMX2434 20053598.png
VCC = EN = 2.25 V
Figure 7. LMX2430 FinIF Input Power vs Frequency
LMX2430 LMX2433 LMX2434 200535a0.png
VCC = EN = 2.25 V
Figure 9. LMX2433 FinIF Input Power vs Frequency
LMX2430 LMX2433 LMX2434 200535a2.png
VCC = EN = 2.25 V
Figure 11. LMX2434 FinIF Input Power vs Frequency
LMX2430 LMX2433 LMX2434 200535a4.png
VCC = EN = 2.25 V
Figure 13. LMX243x OSCin Input Voltage vs Frequency
LMX2430 LMX2433 LMX2434 20053593.png
VCC = EN = 2.75 V
Figure 2. LMX2430 FinRF Input Power vs Frequency
LMX2430 LMX2433 LMX2434 20053595.png
VCC = EN = 2.75 V
Figure 4. LMX2433 FinRF Input Power vs Frequency
LMX2430 LMX2433 LMX2434 20053597.png
VCC = EN = 2.75 V
Figure 6. LMX2434 FinRF Input Power vs Frequency
LMX2430 LMX2433 LMX2434 20053599.png
VCC = EN = 2.75 V
Figure 8. LMX2430 FinIF Input Power vs Frequency
LMX2430 LMX2433 LMX2434 200535a1.png
VCC = EN = 2.75 V
Figure 10. LMX2433 FinIF Input Power vs Frequency
LMX2430 LMX2433 LMX2434 200535a3.png
VCC = EN = 2.75 V
Figure 12. LMX2434 FinIF Input Power vs Frequency
LMX2430 LMX2433 LMX2434 200535a5.png
VCC = EN = 2.75 V
Figure 14. LMX243x OSCin Input Voltage vs Frequency

7.6.2 Charge Pump

LMX2430 LMX2433 LMX2434 200535a6.png
VCC = EN = 2.5 V −40°C ≤ TA ≤ +85°C
Figure 15. LMX243x RF Charge-Pump Sweeps
LMX2430 LMX2433 LMX2434 200535a7.png
VCC = EN = 2.5 V −40°C ≤ TA ≤ +85°C
Figure 16. LMX243x IF Charge-Pump Sweeps

7.6.3 Input Impedance

LMX2430 LMX2433 LMX2434 200535a8.png
VCC = EN = 2.5 V TA = 25°C
Figure 17. LMX243x ULGA FinRF Input Impedance
LMX2430 LMX2433 LMX2434 200535b0.png
VCC = EN = 2.5 V TA = 25°C
Figure 19. LMX243x ULGA FinIF Input Impedance
LMX2430 LMX2433 LMX2434 200535b2.png
VCC = EN = 2.5 V TA = 25°C
Figure 21. LMX243x ULGA OSCin Input Impedance vs Frequency
LMX2430 LMX2433 LMX2434 200535a9.png
VCC = EN = 2.5 V TA = 25°C
Figure 18. LMX243x TSSOP FinRF Input Impedance
LMX2430 LMX2433 LMX2434 200535b1.png
VCC = EN = 2.5 V TA = 25°C
Figure 20. LMX243x TSSOP FinIF Input Impedance
LMX2430 LMX2433 LMX2434 200535b3.png
VCC = EN = 2.5 V TA = 25°C
Figure 22. LMX233xU TSSOP OSCin Input Impedance vs Frequency