SNAS236G October 2005 – January 2016 LMX2485 , LMX2485E
PRODUCTION DATA.
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
This device ideal for use in a broad class of applications, especially those requiring low current consumption and low fractional spurs. For applications that only need a single PLL, the unused PLL can be powered down and will not draw any extra current or generate any spurs or crosstalk.
Table 50 lists the design parameters of the LMX2485x.
PARAMETER | VALUE | |
---|---|---|
PM | Phase Margin | 48.3 degrees |
BW | Loop Bandwidth | 11.3 kHz |
T3/T1 | Pole Ratios | 40.20% |
T4/T3 | 36.30% | |
KPD | Phase Detector Gain | 400 µA |
fPD | Phase Detector Frequency | 10 MHz |
fVCO | Output Frequency | 2400 – 2480 MHz |
Vcc | Supply Voltage | 3 V |
KVCO | VCO Gain | 55 MHz/V |
CVCO | VCO Input Capacitance | 22 pF |
C1_LF | Loop Filter Components | 2.7 nF |
C2_LF | 47 nF | |
C3_LF | 270 pF | |
C4_LF | 180 pF | |
R2_LF | 820 Ω | |
R3_LF | 3.9 kΩ | |
R4_LF | 5.6 kΩ |
The design of the loop filter involves balancing requirements of lock time, spurs, and phase noise. This design is fairly involved, but the TI website has references, design tools, and simulation tools cover the loop filter design and simulation in depth.