R58[15] |
INPIN_IGNORE |
R/W |
1 |
Ignore SYNC and SysRefReq Pins
0: Pins are used. Only valid for VCO_PHASE_SYNC = 1
1: Pin is ignored |
R58[14] |
INPIN_HYST |
R/W |
0 |
High Hysteresis for LVDS mode
0: Disabled
1: Enabled |
R58[13:12] |
INPIN_LVL |
R/W |
0 |
Sets bias level for LVDS mode. In LVDS mode, a voltage divider can be inserted to reduce susceptibility to common-mode noise of an LVDS line because the input is single-ended. With a reasonable setup, TI recommends using INPIN_LVL = 1 (Vin) to use the entire signal swing of an LVDS line.
0: Vin/4
1: Vin
2: Vin/2
3: Invalid |
R58[11:9] |
INPIN_FMT |
R/W |
0 |
0: SYNC = SysRefReq = CMOS
1: SYNC = LVDS, SysRefReq=CMOS
2: SYNC = CMOS, SysRefReq = LVDS
3: SYNC = SysRefReq = LVDS
4: Invalid
5: Invalid
6: Invalid
7: Invalid |