7.6.18 R58 Register (Address = 0x3A) [reset = 0x8000]
R58 is shown in Figure 69 and described in Table 26.
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Figure 69. R58 Register
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
SYNC_PIN_IGNORE |
RESERVED |
R/W-0x1 |
R-0x0 |
|
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
RESERVED |
R-0x0 |
|
Table 26. R58 Register Field Descriptions
Bit |
Field |
Type |
Reset |
Description |
15 |
SYNC_PIN_IGNORE |
R/W |
0x1 |
Enable this bit when NOT using SYNC mode as the SYNC pin interferes with lock detect in this case. When PLL_PHASE_SYNC=1, this bit may be disabled with no issues with lock detect. |
14-0 |
RESERVED |
R |
0x0 |
|