SNVS610P
December 2009 – April 2019
LMZ10504
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Typical Application Circuit
Efficiency VOUT = 3.3 V
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Enable
7.3.2
Enable and UVLO
7.3.3
Soft-Start
7.3.4
Soft-Start Capacitor
7.3.5
Tracking
7.3.6
Tracking - Equal Soft-Start Time
7.3.7
Tracking - Equal Slew Rates
7.3.8
Current Limit
7.3.9
Overtemperature Protection
7.4
Device Functional Modes
7.4.1
Prebias Start-Up Capability
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Custom Design With WEBENCH® Tools
8.2.2.2
Input Capacitor Selection
8.2.2.3
Output Capacitor Selection
8.2.2.3.1
Output Voltage Setting
8.2.2.4
Loop Compensation
8.2.3
Application Curves
8.3
System Examples
8.3.1
Application Schematic for 3.3-V to 5-V Input and 2.5-V Output With Optimized Ripple and Transient Response
8.3.2
Application Schematic for 3.3-V to 5-V Input and 2.5-V Output
8.3.3
EMI Tested Schematic for 2.5-V Output Based on 3.3-V to 5-V Input
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Examples
10.3
Estimate Power Dissipation and Thermal Considerations
10.4
Power Module SMT Guidelines
11
Device and Documentation Support
11.1
Device Support
11.1.1
Third-Party Products Disclaimer
11.1.2
Development Support
11.1.2.1
Custom Design With WEBENCH® Tools
11.2
Documentation Support
11.2.1
Related Documentation
11.3
Receiving Notification of Documentation Updates
11.4
Community Resources
11.5
Trademarks
11.6
Electrostatic Discharge Caution
11.7
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
NDW|7
MMSF024
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snvs610p_oa
snvs610p_pm
10.2
Layout Examples
Figure 29.
Critical Current Loops to Minimize
Figure 30.
PCB Layout Guide
Figure 31.
Top Copper
Figure 32.
Internal Layer 1 (Ground)
Figure 33.
Internal Layer 2 (Ground and Signal Traces)
Figure 34.
Bottom Copper