SNVS610P December   2009  – April 2019 LMZ10504

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application Circuit
      2.      Efficiency VOUT = 3.3 V
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable
      2. 7.3.2 Enable and UVLO
      3. 7.3.3 Soft-Start
      4. 7.3.4 Soft-Start Capacitor
      5. 7.3.5 Tracking
      6. 7.3.6 Tracking - Equal Soft-Start Time
      7. 7.3.7 Tracking - Equal Slew Rates
      8. 7.3.8 Current Limit
      9. 7.3.9 Overtemperature Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Prebias Start-Up Capability
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Input Capacitor Selection
        3. 8.2.2.3 Output Capacitor Selection
          1. 8.2.2.3.1 Output Voltage Setting
        4. 8.2.2.4 Loop Compensation
      3. 8.2.3 Application Curves
    3. 8.3 System Examples
      1. 8.3.1 Application Schematic for 3.3-V to 5-V Input and 2.5-V Output With Optimized Ripple and Transient Response
      2. 8.3.2 Application Schematic for 3.3-V to 5-V Input and 2.5-V Output
      3. 8.3.3 EMI Tested Schematic for 2.5-V Output Based on 3.3-V to 5-V Input
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 Estimate Power Dissipation and Thermal Considerations
    4. 10.4 Power Module SMT Guidelines
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.2.3 Output Capacitor Selection

In general, 22-µF to 100-µF, high-quality dielectric (X5R, X7R) ceramic capacitor rated at twice the maximum output voltage is sufficient given the optimal high-frequency characteristics and low ESR of ceramic dielectrics. Although, the output capacitor can also be of electrolytic chemistry for increased capacitance density.

Two output capacitance equations are required to determine the minimum output capacitance. One equation determines the output capacitance (CO) based on PWM ripple voltage. The second equation determines CO based on the load transient characteristics. Select the largest capacitance value of the two.

The minimum capacitance, given the maximum output voltage ripple (ΔVOUT) requirement, is determined by the following equation:

Equation 12. LMZ10504 eq_13_SNVS610.gif

where

  • the peak to peak inductor current ripple (ΔiL) is equal to Equation 13:
Equation 13. LMZ10504 eq_14_SNVS610.gif

RESR is the total output capacitor ESR, L is the inductance value of the internal power inductor, where L = 1.5 µH, and fSW = 1 MHz. Therefore, per the design example:

Equation 14. LMZ10504 eq_15_SNVS610.gif

The minimum output capacitance requirement due to the PWM ripple voltage is:

Equation 15. LMZ10504 eq_16_SNVS610.gif
Equation 16. LMZ10504 eq_17_SNVS610.gif

Three mΩ is a typical RESR value for ceramic capacitors.

Equation 17 provides a good first pass capacitance requirement for a load transient:

Equation 17. LMZ10504 eq_18_SNVS610.gif

where

  • Istep is the peak to peak load step,
  • VFB = 0.8 V,
  • and ΔVo_tran is the maximum output voltage deviation, which is ±20 mV.

Therefore the capacitance requirement for the given design parameters is:

Equation 18. LMZ10504 eq_19_SNVS610.gif
Equation 19. LMZ10504 eq_20_SNVS610.gif

In this particular design the output capacitance is determined by the load transient requirements.

Table 3 lists some examples of commercially available capacitors that can be used with the LMZ10504.

Table 3. Recommended Output Filter Capacitors

CO (µF) VOLTAGE (V), RESR (mΩ) MAKE MANUFACTURER PART NUMBER CASE SIZE
22 6.3, < 5 Ceramic, X5R TDK C3216X5R0J226M 1206
47 6.3, < 5 Ceramic, X5R TDK C3216X5R0J476M 1206
47 6.3, < 5 Ceramic, X5R TDK C3225X5R0J476M 1210
47 10.0, < 5 Ceramic, X5R TDK C3225X5R1A476M 1210
100 6.3, < 5 Ceramic, X5R TDK C3225X5R0J107M 1210
100 6.3, 50 Tantalum AVX TPSD157M006#0050 D, 7.5 × 4.3 × 2.9 mm
100 6.3, 25 Organic Polymer Sanyo 6TPE100MPB2 B2, 3.5 × 2.8 × 1.9 mm
150 6.3, 18 Organic Polymer Sanyo 6TPE150MIC2 C2, 6.0 × 3.2 × 1.8 mm
330 6.3, 18 Organic Polymer Sanyo 6TPE330MIL D3L, 7.3 × 4.3 × 2.8 mm
470 6.3, 23 Niobium Oxide AVX NOME37M006#0023 E, 7.3 × 4.3 × 4.1 mm