SNVSAQ4C December   2017  – March 2023 LMZM23601

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
    1.     Device Comparison
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 System Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Control Scheme
      2. 7.3.2 Soft-Start Function
      3. 7.3.3 Enable and External UVLO Function
      4. 7.3.4 Current Limit
      5. 7.3.5 Hiccup Mode
      6. 7.3.6 Power Good (PGOOD) Function
      7. 7.3.7 MODE/SYNC Function
        1. 7.3.7.1 Forced PWM Mode
        2. 7.3.7.2 Auto PFM Mode
        3. 7.3.7.3 Dropout Mode
        4. 7.3.7.4 SYNC Operation
      8. 7.3.8 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown
      2. 7.4.2 FPWM Operation
      3. 7.4.3 Auto PFM Mode Operation
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Maximum Input Voltage for VOUT < 2.5 V
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Input Capacitor Selection
        3. 8.2.2.3 Output Capacitor Selection
        4. 8.2.2.4 Feedback Voltage Divider for Adjustable Output Voltage Versions
        5. 8.2.2.5 RPU - PGOOD Pullup Resistor
        6. 8.2.2.6 VIN Divider and Enable
      3. 8.2.3 Application Curves
        1. 8.2.3.1 VOUT = 5 V
        2. 8.2.3.2 VOUT = 3.3 V
        3. 8.2.3.3 VOUT = 12 V
        4. 8.2.3.4 VOUT = 15 V
        5. 8.2.3.5 VOUT = 2.5 V
        6. 8.2.3.6 VOUT = 1.2 V and VOUT = 1.8 V
        7. 8.2.3.7 VOUT = 5 V and 3.3 V Fixed Output Options
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
      1. 8.4.1 Supply Voltage Range
      2. 8.4.2 Supply Current Capability
      3. 8.4.3 Supply Input Connections
        1. 8.4.3.1 Voltage Drops
        2. 8.4.3.2 Stability
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Thermal Design
      2. 8.5.2 Layout Examples
  9. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
      2. 9.1.2 Development Support
        1. 9.1.2.1 Custom Design With WEBENCH® Tools
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  10. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Tape and Reel Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • SIL|10
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Control Scheme

The LMZM23601 power module utilizes peak-current-mode-control architecture. This enables the use of wide range of input voltages while maintaining constant switching frequency and good input and output transient response. The device can be used with 5-V, 12-V, or 24-V typical industrial input voltage rail. The short minimum on- and off-times ensure constant frequency regulation over a wide range of input to output voltage conversion ratios. The adjustable (ADJ) output voltage option operates at 1000-kHz switching frequency. The minimum on- and off- times allow for a duty factor window of 5% to 91% at 1000-kHz switching frequency. If the input voltage exceeds approximately 28 V on the ADJ version, the frequency is smoothly reduced from 1000 kHz as a function of input voltage. The switching frequency reduction allows output voltage regulation and the current mode control to operate with a duty factor below 5%. The fixed 5-V and 3.3-V output options operate at 750 kHz nominal switching frequency and the frequency foldback at high input voltage is not active or needed.

The control architecture also uses frequency foldback at low input voltage to achieve low dropout voltage, maintaining output regulation as the input voltage falls close to output voltage. The frequency foldback at low input voltage is active for the ADJ as well as the 5-V and 3.3-V output options. The reduction in frequency is smooth and continuous and is activated as the off-time approaches the minimum value. Under these conditions, the LMZM23601 device operates much like a constant off-time converter allowing the maximum duty cycle to reach 97%. This feature allows output voltage regulation with very low dropout.

The LMZM23601 features exceptional conversion efficiency at light load. As the load current is reduced, the LMZM23601 transitions to light-load mode if the MODE/SYNC terminal is pulled low. In light-load mode the device uses diode emulation to reduce the RMS inductor current and the switching frequency is reduced. The fixed voltage versions (3.3-V and 5-V) do not need an external voltage divider connected to FB, which results in saving two components and lower standby current when the load is in standby. As a result, the consumed supply current is only 24 µA (typical) with 24-V to 3.3-V conversion and 28 µA (typical) with 24-V to 5-V conversion, while the output is regulated with no load.