The LP2954 is a 5-V micropower LDO with very low quiescent current (90 μA typical at 1-mA load) and very low dropout voltage (typically 60 mV at light loads and 470 mV at 250-mA load current).
The quiescent current increases only slightly at dropout (120 μA typical), which prolongs battery life.
The LP2954 with a fixed 5-V output is available in three-pin TO-220 and DDPAK/TO-263 packages. The adjustable LP2954 is provided in an 8-pin, small-outline SOIC package. The adjustable version also provides a resistor network which can be pin strapped to set the output to any voltage from to 1.23 V to 29 V.
Reverse battery protection is provided for the IN pin.
The tight line and load regulation (0.04% typical), as well as very low output temperature coefficient make the LP2954 well suited for use as a low-power voltage reference.
Output accuracy is ensured at both room temperature and over the entire operating temperature range.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
LP2954 | SOIC (8) | 4.90 mm × 3.91 mm |
DDPAK/TO-263 (3) | 10.18 mm × 8.41 mm | |
TO-220 (3) | 14.986 mm × 10.16 mm |
Changes from D Revision (March 2013) to E Revision
Changes from C Revision (March 2013) to D Revision
PIN | I/O | DESCRIPTION | |||
---|---|---|---|---|---|
NAME | NDE | KTT | D | ||
ERROR | — | — | 5 | O | Error output |
FEEDBACK | — | — | 7 | I | Voltage feedback input |
IN | 1 | 1 | 8 | I | Unregulated input voltage |
GND | 2 | 2 | 4 | — | Ground |
OUT | 3 | 3 | 1 | O | Regulated output voltage. This pin requires an output capacitor to maintain stability. See Detailed Design Procedure for output capacitor details |
SENSE | — | — | 2 | I | Output voltage sense |
SHUTDOWN | — | — | 3 | I | Disable device |
5V TAP | — | — | 6 | O | Internal resistor divider |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Input supply voltage | –20 | 30 | V | |
Power dissipation(2) | Internally Limited | |||
Storage temperature, Tstg | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
Operating junction temperature | –40 | 125 | °C |
THERMAL METRIC(1) | LP2954, LP2954A | UNIT | |||
---|---|---|---|---|---|
KTT (DDPAK/TO-263) | NDE (TO-220) | D (SOIC) | |||
3 PINS | 3 PINS | 8 PINS | |||
RθJA(2) | Junction-to-ambient thermal resistance, High-K | 44.3 | 80.3(3) | 105.0 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 44.8 | 38.6 | 47.3 | °C/W |
RθJB | Junction-to-board thermal resistance | 23.8 | 73.1 | 45.8 | °C/W |
ψJT | Junction-to-top characterization parameter | 10.6 | 13.5 | 6.2 | °C/W |
ψJB | Junction-to-board characterization parameter | 22.7 | 73.1 | 45.2 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | 1.0 | 0.9 | — | °C/W |
PARAMETER | TEST CONDITIONS | LP2954AI | LP2954I | UNIT | |||||
---|---|---|---|---|---|---|---|---|---|
MIN | TYP | MAX | MIN | TYP | MAX | ||||
VO | Output voltage(1) | 4.975 | 5 | 5.025 | 4.95 | 5 | 5.05 | V | |
−40°C to 125°C | 4.94 | 5.06 | 4.9 | 5.1 | |||||
1 mA ≤ IL ≤ 250 mA | 5 | 5 | |||||||
1 mA ≤ IL ≤ 250 mA −40°C to 125°C |
4.93 | 5.07 | 4.88 | 5.12 | |||||
ΔVO/ΔT | Output voltage temperature coefficient | See(2), –40°C ≤ TJ ≤ 125°C | 20 | 100 | 20 | 150 | ppm/°C | ||
ΔVO/VO | Line regulation | VIN = 6 V to 30 V | 0.03% | 0.1% | 0.03% | 0.2% | |||
VIN = 6 V to 30 V –40°C ≤ TJ ≤ 125°C |
0.2% | 0.3% | |||||||
ΔVO/VO | Load regulation | IL = 1 to 250 mA IL = 0.1 to 1 mA(3) |
0.04% | 0.16% | 0.04% | 0.2% | |||
IL = 1 to 250 mA IL = 0.1 to 1 mA –40°C ≤ TJ ≤ 125°C |
0.2% | 0.3% | |||||||
VIN – VO | Dropout voltage(4) | IL = 1 mA | 60 | 100 | 60 | 100 | mV | ||
IL = 1 mA –40°C ≤ TJ ≤ 125°C |
150 | 150 | |||||||
IL = 50 mA | 240 | 300 | 240 | 300 | |||||
IL = 50 mA, –40°C ≤ TJ ≤ 125°C |
420 | 420 | |||||||
IL = 100 mA | 310 | 400 | 310 | 400 | |||||
IL = 100 mA –40°C ≤ TJ ≤ 125°C |
520 | 520 | |||||||
IL = 250 mA | 470 | 600 | 470 | 600 | |||||
IL = 250 mA –40°C ≤ TJ ≤ 125°C |
800 | 800 | |||||||
IGND | Ground pin current(5) | IL = 1 mA | 90 | 150 | 90 | 150 | µA | ||
IL = 1 mA –40°C ≤ TJ ≤ 125°C |
180 | 180 | |||||||
IL = 50 mA | 1.1 | 2 | 1.1 | 2 | mA | ||||
IL = 50 mA –40°C ≤ TJ ≤ 125°C |
2.5 | 2.5 | |||||||
IL = 100 mA | 4.5 | 6 | 4.5 | 6 | |||||
IL = 100 mA –40°C ≤ TJ ≤ 125°C |
8 | 8 | |||||||
IL = 250 mA | 21 | 28 | 21 | 28 | |||||
IL = 250 mA –40°C ≤ TJ ≤ 125°C |
33 | 33 | |||||||
IGND | Ground pin current at dropout(5) | VIN = 4.5 V | 120 | 170 | 120 | 170 | µA | ||
VIN = 4.5 V –40°C ≤ TJ ≤ 125°C |
210 | 210 | |||||||
ILIMIT | Current limit | VO = 0 V | 380 | 500 | 380 | 500 | mA | ||
VO = 0 V –40°C ≤ TJ ≤ 125°C |
530 | 530 | |||||||
ΔVO/ΔPD | Thermal regulation | See(6) | 0.05 | 0.2 | 0.05 | 0.2 | %/W | ||
en | Output noise 10 Hz to 100 kHz |
IL = 100 mA, CL = 2.2 µF | 400 | 400 | μVRMS | ||||
IL = 100 mA, CL = 33 µF | 260 | 260 | |||||||
IL = 100 mA, CL = 33 µF(7) | 80 | 80 | |||||||
ADDITIONAL SPECIFICATIONS FOR THE ADJUSTABLE DEVICE (LP2954AIM and LP2954IM) | |||||||||
VREF | Reference voltage | See(8) | 1.215 | 1.23 | 1.245 | 1.205 | 1.23 | 1.255 | V |
See(8)
–40°C ≤ TJ ≤ 125°C |
1.205 | 1.255 | 1.19 | 1.27 | |||||
ΔVREF/ VREF |
Reference voltage line regulation | VIN= 2.5 V to VO(NOM) + 1 V | 0.03% | 0.1% | 0.03% | 0.2% | |||
VIN= 2.5 V to VO(NOM) +1 V to 30 V(9)(8)–40°C ≤ TJ ≤ 125°C | 0.2% | 0.4% | |||||||
ΔVREF/ΔT | Reference voltage temperature coefficient | See(2)
–40°C ≤ TJ ≤ 125°C |
20 | ppm/°C | |||||
IB(FB) | Feedback pin bias current | 20 | 40 | 20 | 40 | nA | |||
–40°C ≤ TJ ≤ 125°C | 60 | 60 | |||||||
IGND | Ground pin current at shutdown(5) | VSHUTDOWN ≤ 1.1 V | 105 | 140 | 105 | 140 | μA | ||
IO(SINK) | Output OFF pulldown current | See(10) | 30 | 30 | mA | ||||
See(10)
–40°C ≤ TJ ≤ 125°C |
20 | 20 | |||||||
DROPOUT DETECTION COMPARATOR | |||||||||
IOH | Output HIGH leakage current | VOH = 30 V | 0.01 | 1 | 0.01 | 1 | µA | ||
VOH = 30 V, –40°C ≤ TJ ≤ 125°C | 2 | 2 | |||||||
VOL | Output LOW voltage | VIN = VO(NOM) − 0.5 V IO(COMP) = 400 μA –40°C ≤ TJ ≤ 125°C |
150 | 250 | 150 | 250 | mV | ||
400 | 400 | ||||||||
VTHR(MAX) | Upper threshold voltage | See(11) | –80 | –60 | –35 | –80 | –60 | –35 | mV |
See(11)
–40°C ≤ TJ ≤ 125°C |
–95 | –25 | –95 | –25 | |||||
VTHR(MIN) | Lower threshold voltage | See(11) | –110 | –85 | –55 | –110 | –85 | –55 | mV |
See(11)
–40°C ≤ TJ ≤ 125°C |
–160 | –40 | –160 | –40 | |||||
HYST | Hysteresis | See(11) | 15 | 15 | mV | ||||
SHUTDOWN INPUT | |||||||||
VOS | Input offset voltage | (Referred to VREF) | −7.5 | ±3 | 7.5 | −7.5 | ±3 | 7.5 | mV |
(Referred to VREF), –40°C ≤ TJ ≤ 125°C | –10 | 10 | –10 | 10 | |||||
HYST | Hysteresis | 6 | 6 | mV | |||||
IB | Input bias current | VIN(SHUTDOWN) = 0 V to 5 V | –30 | 10 | 30 | –30 | 10 | 30 | nA |
VIN(SHUTDOWN) = 0 V to 5 V, –40°C ≤ TJ ≤ 125°C |
–50 | 50 | –50 | 50 |
The LP2954 is a 5-V micropower LDO with very low quiescent current (90 μA typical at 1-mA load) and very low dropout voltage (typically 60 mV at light loads and 470 mV at 250-mA load current).
The dropout voltage of the regulator is defined as the minimum input-to-output voltage differential required for the output voltage to stay within 100 mV of the output voltage measured with a 1-V differential. The dropout voltages for various values of load current are listed under Electrical Characteristics.
If the regulator is powered from a rectified AC source with a capacitive filter, the minimum AC line voltage and maximum load current must be used to calculate the minimum voltage at the input of the regulator. The minimum input voltage, including AC ripple on the filter capacitor, must not drop below the voltage required to keep the LP2954 in regulation. It is also advisable to verify operating at minimum operating ambient temperature, because the increasing ESR of the filter capacitor makes this a worst-case test for dropout voltage due to increased ripple amplitude.
This comparator produces a logic LOW whenever the output falls out of regulation by more than about 5%. The 5% value is from the comparators built-in offset of 60 mV divided by the 1.23-V reference. The 5% low trip level remains constant regardless of the programmed output voltage. An out-of-regulation condition can result from low input voltage, current limiting, or thermal limiting.
Figure 17 gives a timing diagram showing the relationship between the output voltage, the ERROR output, and input voltage as the input voltage is ramped up and down to a regulator programmed for 5-V output. The ERROR signal becomes low at about 1.3-V input. It goes high at about 5-V input, where the output equals 4.75 V. Because the dropout voltage is load dependent, the input voltage trip points vary with load current. The output voltage trip point does not vary.
The comparator has an open-collector output which requires an external pullup resistor. This resistor may be connected to the regulator output or some other supply voltage. Using the regulator output prevents an invalid HIGH on the comparator output which occurs if it is pulled up to an external voltage while the regulator input voltage is reduced below 1.3 V. In selecting a value for the pullup resistor note that, while the output can sink 400 μA, this current adds to battery drain. Suggested values range from 100 kΩ to 1 MΩ. This resistor is not required if the output is unused.
When VIN ≤ 1.3 V, the ERROR pin becomes a high impedance, allowing the error flag voltage to rise to its pullup voltage. Using VOUT as the pullup voltage (rather than an external 5-V source) keeps the error flag voltage below 1.2 V (typical) in this condition. The user may wish to divide down the error flag voltage using equal-value resistors (10 kΩ suggested) to ensure a low-level logic signal during any fault condition, while still allowing a valid high logic level during normal operation.
The regulator output can be left connected to an active voltage source (such as a battery) with the regulator input power turned off, as long as the regulator ground pin is connected to ground. If the ground pin is left floating, damage to the regulator can occur if the output is pulled up by an external voltage source.
In reference applications it may be advantageous to reduce the AC noise present on the output. One method is to reduce regulator bandwidth by increasing output capacitance. This is relatively inefficient, because large increases in capacitance are required to get significant improvement.
Noise can be reduced more effectively by a bypass capacitor placed across R1 (refer to Figure 19). The formula for selecting the capacitor to be used is:
This gives a value of about 0.1 μF. When this is used, the output capacitor must be 6.8 μF (or greater) to maintain stability. The 0.1-μF capacitor reduces the high frequency gain of the circuit to unity, lowering the output noise from 260 μV to 80 μV using a 10-Hz to 100-kHz bandwidth. Also, noise is no longer proportional to the output voltage, so improvements are more pronounced at high output voltages.
A logic-level signal shuts off the regulator output when a LOW (< 1.2 V) is applied to the SHUTDOWN input.
To prevent possible mis-operation, the SHUTDOWN input must be actively terminated. If the input is driven from open-collector logic, a pullup resistor (TI recommends 20 kΩ to 100 kΩ) must be connected from the SHUTDOWN input to the regulator input.
If the SHUTDOWN input is driven from a source that actively pulls high and low (like an operational amplifier), the pullup resistor is not required, but may be used.
If the shutdown function is not to be used, the cost of the pullup resistor can be saved by simply tying the SHUTDOWN input directly to the regulator input.
IMPORTANT: Because the Absolute Maximum Ratings state that the SHUTDOWN input cannot go more than 0.3 V below ground, the reverse-battery protection feature that protects the regulator input is sacrificed if the SHUTDOWN input is tied directly to the regulator input.
If reverse-battery protection is required in an application, the pullup resistor between the SHUTDOWN input and the regulator input must be used. The recommended 20 kΩ to 100 kΩ provides adequate protection of the SHUTDOWN pin during negative voltage transitions at the IN pin.
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The LP2954-N is a linear voltage regulator operating from 2.3 V to 30 V on the input and regulated output voltage of 5 V with typical 0.5% accuracy (LP2954AI) and 250 mA maximum output current. For linear voltage regulator the efficiency is defined by the ratio of output voltage to input voltage (efficiency = VOUT/VIN). To achieve high efficiency, the dropout voltage (VIN – VOUT) must be as small as possible, thus requiring a very low dropout LDO. Successfully implementing an LDO in an application depends on the application requirements. If the requirements are simply input voltage and output voltage, compliance specifications (such as internal power dissipation or stability) must be verified to ensure a solid design. If timing, start-up, noise, PSRR, or any other transient specification is required, the design becomes more challenging.
For typical LDO applications, use the parameters listed in Table 1.
DESIGN PARAMETER | EXAMPLE VALUE |
---|---|
Input voltage | 2.5 V to 30 V |
Output voltage | 1.23 V to 29 V |
Output current | 250 mA (maximum) |
RMS noise, 10 Hz to100 kHz | 260 μVRMS |
A 2.2 μF (or greater) capacitor is required between the OUT pin and GND to assure stability (refer to Figure 20). Without this capacitor, the device may oscillate. Most types of tantalum or aluminum electrolytic capacitors work here. Film-type capacitors work, but are more expensive. Many aluminum electrolytics contain electrolytes which freeze at −30°C, which requires the use of solid tantalums below −25°C. The important parameters of the capacitor are an equivalent series resistance (ESR) of about 5 Ω or less and a resonant frequency above 500 kHz (the ESR may increase by a factor of 20 or 30 as the temperature is reduced from 25°C to −30°C). The value of this capacitor may be increased without limit. At lower values of output current, less output capacitance is required for stability. The capacitor can be reduced to 0.68 μF for currents below 10 mA or 0.22 μF for currents below 1 mA.
Place a 1-μF capacitor from the IN pin to GND if there is more than 10 inches of wire between the input and the AC filter capacitor or if a battery input is used.
Programming the output for voltages below 5 V runs the error amplifier at lower gains requiring more output capacitance for stability. At 3.3-V output, a minimum of 4.7 μF is required. For the worst case condition of 1.23-V output and 250 mA of load current, a 6.8-μF (or larger) capacitor must be used.
Stray capacitance to the FEEDBACK pin can cause instability. This problem is most likely to appear when using high value external resistors to set the output voltage. Adding a 100-pF capacitor between the OUT and FEEDBACK pins and increasing the output capacitance to 6.8 μF (or greater) solves the problem.
When setting the output voltage using an external resistive divider, TI recommends a minimum current of 1 μA through the resistors to provide a minimum load.
It should be noted that a minimum load current is specified in several of the electrical characteristic test conditions, so this value must be used to obtain correlation on these tested limits. The part is parametrically tested down to 100 μA, but is functional with no load.
The SOIC version of the LP2954 regulator may be pin strapped for 5-V operation using its internal resistive divider by tying the OUT and SENSE pins together and also tying the FEEDBACK and 5V TAP pins together.
Alternatively, it may be programmed for any voltage between the 1.23-V reference and the 30-V maximum rating using an external pair of resistors (see Figure 19). The complete equation for the output voltage is:
where VREF is the 1.23-V reference and IFB is the FEEDBACK pin bias current (−20 nA typical). The minimum recommended load current of 1 μA sets an upper limit of 1.2 MΩ on the value of R2 in cases where the regulator must work with no load (see Minimum Load). IFB produces a typical 2% error in VOUT which can be eliminated at room temperature by trimming R1. For better accuracy, choosing R2 = 100 kΩ reduces this error to 0.17% while increasing the resistor program current to 12 μA. Because the typical quiescent current is 120 μA, this added current is negligible.
Knowing the device power dissipation and proper sizing of the thermal plane connected to the tab or pad is critical to ensuring reliable operation. Device power dissipation depends on input voltage, output voltage, and load conditions and can be calculated with Equation 3.
Power dissipation can be minimized, and greater efficiency can be achieved, by using the lowest available voltage drop option that would still be greater than the dropout voltage (VDO). However, keep in mind that higher voltage drops result in better dynamic (that is, PSRR and transient) performance.
Power dissipation and junction temperature are most often related by the junction-to-ambient thermal resistance (RθJA) of the combined PCB and device package and the temperature of the ambient air (TA), according to Equation 4 or Equation 5:
Unfortunately, this RθJA is highly dependent on the heat-spreading capability of the particular PCB design, and therefore varies according to the total copper area, copper weight, and location of the planes. The RθJA recorded in Thermal Information is determined by the specific EIA/JEDEC JESD51-7 standard for PCB and copper-spreading area, and is to be used only as a relative measure of package thermal performance. For a well-designed thermal layout, RθJA is actually the sum of the package junction-to-case (bottom) thermal resistance (RθJCbot) plus the thermal resistance contribution by the PCB copper area acting as a heat sink.
The EIA/JEDEC standard recommends the use of psi (Ψ) thermal characteristics to estimate the junction temperatures of surface mount devices on a typical PCB board application. These characteristics are not true thermal resistance values, but rather package specific thermal characteristics that offer practical and relative means of estimating junction temperatures. These psi metrics are determined to be significantly independent of copper-spreading area. The key thermal characteristics (ΨJT and ΨJB) are given in Thermal Information and are used in accordance with Equation 6 or Equation 7.
where
where
For more information about the thermal characteristics ΨJT and ΨJB, Semiconductor and IC Package Thermal Metrics; for more information about measuring TTOP and TBOARD, see Using New Thermal Metrics; and for more information about the EIA/JEDEC JESD51 PCB used for validating RθJA, see Thermal Characteristics of Linear and Logic Packages Using JEDEC PCB Designs. These application notes are available at www.ti.com.
A heat sink may be required with the LP2954IT depending on the maximum power dissipation and maximum ambient temperature of the application. Under all possible operating conditions, the junction temperature must be within the range specified under Recommended Operating Conditions.
To determine if a heat sink is required, the maximum power dissipated by the regulator, P(MAX), must be calculated. It is important to remember that if the regulator is powered from a transformer connected to the AC line, the maximum specified AC input voltage must be used (because this produces the maximum DC input voltage to the regulator). Figure 20 shows the voltages and currents that are present in the circuit. The formula for calculating the power dissipated in the regulator is also shown in Figure 20.
The next parameter which must be calculated is the maximum allowable temperature rise, TR(MAX). This is calculated by using the formula:
where
Using the calculated values for TR(MAX) and P(MAX), the required value for junction-to-ambient thermal resistance, RθJA , can now be found:
If the calculated value is 60°C/W or higher , the regulator may be operated without an external heat sink. If the calculated value is below 60°C/W, an external heatsink is required. The required thermal resistance for this heat sink can be calculated using the formula:
where
UNIT (C°/W) | |
Silicone grease | 1 |
Dry interface | 1.3 |
Mica with grease | 1.4 |
UNIT (C°/W) | |
Thermasil III | 1.3 |
Thermasil II | 1.5 |
Thermalfilm (0.002) with grease | 2.2 |
The LP2954 is designed to operate from a minimum input voltage supply of either 2.5 V or VOUT(NOM) + 1 V, whichever is higher. The maximum input supply voltage is 30 V, but may be limited by thermal dissipation of the selected package. The input voltage range provides adequate headroom in order for the device to have a regulated output. This input supply must be well regulated. If the input supply is noisy, additional input capacitors with low ESR can help. improve the output noise performance.