SNVS096E June   1999  – July 2016 LP2954 , LP2954A

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Dropout Voltage
      2. 7.3.2 Dropout Detection Comparator
      3. 7.3.3 Output Isolation
      4. 7.3.4 Reducing Output Noise
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Input
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 External Capacitors
        2. 8.2.2.2 Minimum Load
        3. 8.2.2.3 Programming The Output Voltage
        4. 8.2.2.4 Power Dissipation
        5. 8.2.2.5 Estimating Junction Temperature
        6. 8.2.2.6 Heatsinking the TO-220 Package
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

NDE Package
3-Pin TO-220
Front View
LP2954 LP2954A 01112802.png
KTT Package
3-Pin DDPAK/TO-263
Front View
LP2954 LP2954A 01112809.png
D Package
8-Pin SOIC
Top
LP2954 LP2954A 01112833.png

Pin Functions

PIN I/O DESCRIPTION
NAME NDE KTT D
ERROR — — 5 O Error output
FEEDBACK — — 7 I Voltage feedback input
IN 1 1 8 I Unregulated input voltage
GND 2 2 4 — Ground
OUT 3 3 1 O Regulated output voltage. This pin requires an output capacitor to maintain stability. See Detailed Design Procedure for output capacitor details
SENSE — — 2 I Output voltage sense
SHUTDOWN — — 3 I Disable device
5V TAP — — 6 O Internal resistor divider