SNVS001F april   2000  – july 2023 LP2980-ADJ

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Output Enable
      2. 7.3.2 Dropout Voltage
      3. 7.3.3 Current Limit
      4. 7.3.4 Undervoltage Lockout (UVLO)
      5. 7.3.5 Output Pulldown
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Functional Mode Comparison
      2. 7.4.2 Normal Operation
      3. 7.4.3 Dropout Operation
      4. 7.4.4 Disabled
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 External Feedback Resistors
      2. 8.1.2 Recommended Capacitor Types
        1. 8.1.2.1 Recommended Capacitors for the New Chip
        2. 8.1.2.2 Recommended Capacitors for the Legacy Chip
      3. 8.1.3 Input and Output Capacitor Requirements
      4. 8.1.4 Feed-Forward Capacitor (CFF)
      5. 8.1.5 Reverse Current
      6. 8.1.6 Power Dissipation (PD)
      7. 8.1.7 Estimating Junction Temperature
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Setting VOUT For the LP2980-ADJ LDO
        2. 8.2.2.2 ON/OFF Input Operation
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Device Nomenclature
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Typical Characteristics

at operating temperature TJ = 25°C, VIN = VOUT(NOM) + 1.0 V or 2.5 V (whichever is greater), IOUT = 1 mA, ON/OFF pin tied to VIN, CIN = 1.0 µF, and COUT = 4.7 µF (unless otherwise noted)

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Figure 6-1 Output Voltage vs Temperature for Legacy Chip
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Figure 6-3 Output Voltage vs VIN for Legacy Chip
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Figure 6-5 Dropout Voltage vs VIN for New Chip
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Figure 6-7 Dropout Voltage vs Temperature for Legacy Chip
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Figure 6-9 Dropout Voltage vs Load Current for Legacy Chip
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Figure 6-11 Output Regulation vs Load Current for Legacy Chip
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Figure 6-13 Output Regulation vs Load Current and Temperature for New Chip
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Figure 6-15 Ground-Pin Current vs Temperature for Legacy Chip
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Figure 6-17 Ground Pin Current vs Load Current for Legacy Chip
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Figure 6-19 Input Current vs Input Voltage for Legacy Chip
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Figure 6-21 Short-Circuit Current vs Time for Legacy Chip
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Figure 6-23 Short-Circuit Current vs Time for Legacy Chip
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Figure 6-25 Short-Circuit Current vs Output Voltage for Legacy Chip
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Figure 6-27 Short-Circuit Current vs Temperature for New Chip
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Figure 6-29 ADJ Pin Bias Current vs Load Current for New Chip
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Figure 6-31 ADJ Pin Bias Current vs Temperature for New Chip
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Figure 6-33 ON/OFF Threshold vs Temperature for New Chip
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 VIN = 4.3 V, VOUT = 3.3 V, IOUT = 50 mA, COUT = 2.2 μF
Figure 6-35 Output Noise Density vs CFF for New Chip
GUID-20230619-SS0I-FBH0-425H-LK4J4RGWZ3HQ-low.svg
 VIN = 4.3 V, VOUT = 3.3 V, COUT = 2.2 μF, CFF = 10 pF
Figure 6-37 Output Noise Density vs IOUT for New Chip
GUID-20230608-SS0I-V00G-ZJST-NL5QPTHMR4NV-low.svg
 VIN = 4.3 V, VOUT = 3.3 V, IOUT = 50 mA, COUT = 2.2 μF
Figure 6-39 Ripple Rejection vs CFF for New Chip
GUID-20230619-SS0I-RZNN-PXZ8-FHLLRZF4N7RC-low.svg
 VIN = 4.3 V, VOUT = 3.3 V, COUT = 2.2 μF, CFF = 10 pF
Figure 6-41 Ripple Rejection vs IOUT for New Chip
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Figure 6-43 4.7-μF ESR Curves for Legacy Chip
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VIN = 4.3 V, VOUT = 3.3 V
Figure 6-2 Output Voltage vs Temperature for New Chip
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Figure 6-4 Output Voltage vs VIN for New Chip
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Figure 6-6 Dropout Voltage vs VIN and Temperature for New Chip
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Figure 6-8 Dropout Voltage vs Temperature for New Chip
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Figure 6-10 Dropout Voltage vs Load Current for New Chip
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Figure 6-12 Output Regulation vs Load Current for New Chip
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Figure 6-14 Output Regulation vs Input Voltage for New Chip
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Figure 6-16 Ground-Pin Current vs Temperature for New Chip
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Figure 6-18 Ground Pin Current vs Load Current for New Chip
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Figure 6-20 Input Current vs Input Voltage for New Chip
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VIN = 6 V
Figure 6-22 Short-Circuit Current vs Time for New Chip
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Figure 6-24 Short-Circuit Current vs Time for New Chip
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Figure 6-26 Short-Circuit Current vs Output Voltage for New Chip
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Figure 6-28 ADJ Pin Bias Current vs. Load Current for Legacy Chip
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Figure 6-30 ADJ Pin Bias Current vs Temperature for Legacy Chip
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Figure 6-32 ON/OFF Threshold vs Temperature for Legacy Chip
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Figure 6-34 Output Noise Density for Legacy Chip
GUID-20230619-SS0I-RPPD-NKJ3-ZP6X09JX4STQ-low.svg
 VIN = 4.3 V, VOUT = 3.3 V, IOUT = 50 mA, CFF = 10 pF
Figure 6-36 Output Noise Density vs COUT for New Chip
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Figure 6-38 Ripple Rejection for Legacy Chip
GUID-20230619-SS0I-6CLB-BP69-SGWSBM7TGJTX-low.svg
 VIN = 4.3 V, VOUT = 3.3 V, IOUT = 50 mA, CFF = 10 pF
Figure 6-40 Ripple Rejection vs COUT for New Chip
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Figure 6-42 2.2-μF ESR Curves for Legacy Chip