SNOS510Q November 1999 – October 2016 LP2985LV-N
PRODUCTION DATA.
The LP2985LV-N family of fixed-output, ultra-low-dropout and low-noise regulators offers exceptional, cost-effective performance for battery-powered applications. Available in output voltages from 1.5 V to 2 V, the family has an output voltage tolerance of 1% for the A version (1.5% for the non-A version) and is capable of delivering 150-mA continuous load current. Standard regulator features, such as overcurrent and overtemperature protection, are also included.
Using an optimized vertically integrated PNP (VIP) process, the LP2985LV-N contains several features to facilitate battery-powered designs:
In order to meet different application requirement, the LP2985LV-N family provide multiple fixed output options from 1.5 V to 2 V. Contact your regional TI sales team for custom voltage options.
Output voltage accuracy specifies minimum and maximum output voltage error, relative to the expected nominal output voltage stated as a percent. This accuracy error includes the errors introduced by the internal reference and the load and line regulation across the full range of rated load and line operating conditions over temperature, unless otherwise specified by the Electrical Characteristics. Output voltage accuracy also accounts for all variations between manufacturing lots.
Generally speaking, the dropout voltage often refers to the voltage difference between the input and output voltage (VDO = VIN – VOUT), where the current pass transistor loses its voltage-controlled current capability and the collector (VOUT) to emitter (VIN) voltage becomes constant for a given current and is characterized by the classic VCE(SAT) of the PNP transistor. VDO indirectly specifies a minimum input voltage above the nominal programmed output voltage at which the output voltage is expected to remain within its accuracy boundary. If the input falls below this VDO limit (VIN < VOUT + VDO), then active regulation of the output voltage is no longer possible, and the output voltage decreases as the input voltage falls.
The LP2985LV-N device uses a vertical PNP process which allows for quiescent currents that are considerably lower than those associated with traditional lateral PNP regulators, typically 825 μA at 150-mA load.
When the ON/OFF pin is pulled to a low level the LP2985LV-N enters sleep mode, and less than 2-μA quiescent current is consumed. This function is designed for the application which needs a sleep mode to effectively enhance battery life cycle.
The internal current limit circuit is used to protect the LDO against high-load current faults or shorting events. The LDO is not designed to operate in a steady-state current limit. During a current-limit event, the LDO sources constant current. Therefore, the output voltage falls when load impedance decreases. Note also that if a current limit occurs and the resulting output voltage is low, excessive power may be dissipated across the LDO, resulting in a thermal shutdown of the output.
A foldback feature limits the short-circuit current to protect the regulator from damage under all load conditions. If VOUT is forced below 0 V before EN goes high and the load current required exceeds the foldback current limit, the device may not start up correctly.
The LP2985LV-N contains a thermal shutdown protection circuit to turn off the output current when excessive heat is dissipated in the LDO. The thermal time-constant of the semiconductor die is fairly short, and thus the output cycles on and off at a high rate when thermal shutdown is reached until the power dissipation is reduced.
The internal protection circuitry of the LP2985LV-N is designed to protect against thermal overload conditions. The circuitry is not intended to replace proper heat sinking. Continuously running the device into thermal shutdown degrades its reliability.
The LP2985LV-N is designed specifically to work with ceramic output capacitors, utilizing circuitry which allows the regulator to be stable across the entire range of output current with an output capacitor whose ESR is as low as 5 mΩ. For output capacitor requirement, refer to Output Capacitor.
The LP2985LV-N includes a low-noise reference ensuring minimal noise during operation because the internal reference is normally the dominant term in noise analysis. Further noise reduction can be achieved by adding an external bypass bapacitor between the BYPASS pin and the GND pin.
The device operate if the input voltage is equal to, or exceeds VOUT(TARGET) + 0.6 V. At input voltages below the minimum VIN requirement, the devices do not operate correctly and output voltage may not reach target value.
If the voltage on the ON/OFF pin is less than 0.15 V, the device is disabled, and in this state shutdown current does not exceed 2 μA. Raising ON/OFF above 1.6 V initiates the start-up sequence of the device.