SNVS322M December   2004  – December 2015 LP38690 , LP38692

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Enable (EN)
      2. 7.3.2 Thermal Shutdown Protection (TSD)
      3. 7.3.3 Foldback Current Limiting
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable (EN)
      2. 7.4.2 Minimum Operating Input Voltage (VIN)
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Reverse Voltage
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Power Dissipation and Device Operation
        2. 8.2.2.2 External Capacitors
          1. 8.2.2.2.1 Input Capacitor
          2. 8.2.2.2.2 Output Capacitor
          3. 8.2.2.2.3 No Load Stability
          4. 8.2.2.2.4 Capacitor Characteristics
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 PCB Layout
    2. 10.2 Layout Examples
    3. 10.3 WSON Mounting
    4. 10.4 RFI/EMI Susceptibility
    5. 10.5 Output Noise
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
V(max) All pins (with respect to GND) –0.3 12 V
IOUT(3) Internally limited
Junction temperature −40 150 °C
Lead temperature (soldering, 5 seconds) 260
Power dissipation(2) Internally limited
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) At elevated temperatures, device power dissipation must be derated based on package thermal resistance and heatsink values (if a heatsink is used). When using the WSON package, refer to TI Application Report AN-1187 Leadless Leadframe Package (LLP) (SNOA401) and the WSON Mounting section in this datasheet. If power dissipation causes the junction temperature to exceed specified limits, the device goes into thermal shutdown.
(3) If used in a dual-supply system where the regulator load is returned to a negative supply, the output pin must be diode clamped to ground.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VIN supply voltage 2.7 10 V
Operating junction temperature −40 125 °C

6.4 Thermal Information

THERMAL METRIC(1) LP38690 LP38690/92 LP38692 UNIT
TO-252 WSON SOT-223
3 PINS 6 PINS 5 PINS
RθJA(2) Junction-to-ambient thermal resistance 50.5 50.6 68.5 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 52.6 44.4 52.2 °C/W
RθJB Junction-to-board thermal resistance 29.7 24.9 13.0 °C/W
ψJT Junction-to-top characterization parameter 4.8 0.4 5.5 °C/W
ψJB Junction-to-board characterization parameter 29.3 25.1 12.8 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 1.5 5.4 n/a °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
(2) Junction-to-ambient thermal resistance, High-K.

6.5 Electrical Characteristics

Unless otherwise specified: VIN = VOUT + 1 V, CIN = COUT = 10 µF, ILOAD = 10 mA, and limits are for TJ = 25°C. Minimum (MIN) and maximum (MAX) limits are specified through testing, statistical correlation, or design.
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
VOUT Output voltage tolerance –2.5 2.5 %VOUT
100 µA < IL < 1 A
VO + 1 V ≤ VIN ≤ 10 V
−40°C ≤ TJ ≤ 125°C		 –5 5
ΔVOUT/ΔVIN Output voltage line regulation(2) VOUT + 0.5 V ≤ VIN ≤ 10 V
IL = 25 mA		 0.03 %/A
VOUT + 0.5 V ≤ VIN ≤ 10 V
IL = 25 mA
−40°C ≤ TJ ≤ 125°C		 1
ΔVOUT/ΔIL Output voltage load regulation(3) 1 mA < IL < 1 A
VIN = VOUT + 1 V		 1.8 V
1 mA < IL < 1 A
VIN = VOUT + 1 V
−40°C ≤ TJ ≤ 125°C		 5
VIN – VOUT Dropout voltage(4) VOUT = 1.8 V
IL = 1 A		 950 mV
VOUT = 1.8 V
IL = 1 A
−40°C ≤ TJ ≤ 125°C		 1600
VOUT = 2.5 V IL = 0.1 A 80
IL = 1 A 800
VOUT = 2.5 V
−40°C ≤ TJ ≤ 125°C 		IL = 0.1 A 145
IL = 1 A 1300
VOUT = 3.3 V IL = 0.1 A 65
IL = 1 A 650
VOUT = 3.3 V
−40°C ≤ TJ ≤ 125°C 		IL = 0.1 A 110
IL = 1 A 1000
VOUT = 5 V IL = 0.1 A 45
IL = 1 A 450
VOUT = 5 V,
−40°C ≤ TJ ≤ 125°C 		IL = 0.1 A 100
IL = 1 A 800
IQ Quiescent current VIN ≤ 10 V, IL = 100 µA to 1 A 55 µA
VIN ≤ 10 V, IL = 100 µA to 1 A
−40°C ≤ TJ ≤ 125°C		 100
VEN ≤ 0.4 V (LP38692 only) 0.001
IL(MIN) Minimum load current VIN – VOUT ≤ 4 V
−40°C ≤ TJ ≤ 125°C		 100
IFB Foldback current limit VIN – VOUT > 5 V 450 mA
VIN – VOUT < 4 V 1500
PSRR Ripple rejection VIN = VOUT + 2 V(DC), with 1V(p-p) / 120 Hz ripple 55 dB
TSD Thermal shutdown activation (junction temp) 160 °C
TSD (HYST) Thermal shutdown hysteresis (junction temp) 10
en Output noise VOUT = 3.3 V, BW = 10 Hz to 10 kHz 0.7 µV/√Hz
VOUT (LEAK) Output leakage current VOUT = VOUT(NOM) + 1 V at 10 VIN 0.5 12 µA
VEN Enable voltage (LP38692 only) Output = OFF, −40°C ≤ TJ ≤ 125°C 0.4 V
Output = ON, VIN = 4 V
−40°C ≤ TJ ≤ 125°C		 1.8
Output = ON, VIN = 6 V
−40°C ≤ TJ ≤ 125°C		 3
Output = ON, VIN = 10 V
−40°C ≤ TJ ≤ 125°C		 4
IEN Enable pin leakage VEN = 0 V or 10 V, VIN = 10 V –1 0.001 1 µA
(1) Typical numbers represent the most likely parametric norm for 25°C operation.
(2) Output voltage line regulation is defined as the change in output voltage from nominal value resulting from a change in input voltage.
(3) Output voltage load regulation is defined as the change in output voltage from nominal value as the load current increases from 1 mA to full load.
(4) Dropout voltage is defined as the minimum input to output differential required to maintain the output within 100 mV of nominal value.

6.6 Typical Characteristics

Unless otherwise specified: TJ = 25°C, CIN = COUT = 10 µF, EN pin is tied to VIN (LP38692 only), VOUT = 1.8 V, VIN = VOUT + 1 V, IL = 10 mA.
LP38690 LP38692 20126635.gif
Figure 1. Noise vs Frequency
LP38690 LP38692 20126637.gif
Figure 3. Noise vs Frequency
LP38690 LP38692 20126636.gif
Figure 2. Noise vs Frequency
LP38690 LP38692 20126618.gif
Figure 4. Ripple Rejection
LP38690 LP38692 20126620.gif
Figure 5. Ripple Rejection
LP38690 LP38692 20126624.gif
Figure 7. Line Transient Response
LP38690 LP38692 20126628.gif
Figure 9. Line Transient Response
LP38690 LP38692 20126641.gif
Figure 11. Load Transient Response
LP38690 LP38692 20126643.gif
Figure 13. Load Transient Response
LP38690 LP38692 20126630.gif
Figure 15. VOUT vs Temperature (5 V)
LP38690 LP38692 20126632.gif
Figure 17. VOUT vs Temperature (2.5 V)
LP38690 LP38692 20126659.png
Figure 19. VOUT vs VIN (1.8 V)
LP38690 LP38692 20126650.gif
Figure 21. Dropout Voltage vs IOUT
LP38690 LP38692 20126652.gif
Figure 23. Enable Voltage vs Temperature
LP38690 LP38692 20126654.gif
Figure 25. Line Regulation vs Temperature
LP38690 LP38692 20126622.gif
Figure 6. Ripple Rejection
LP38690 LP38692 20126626.gif
Figure 8. Line Transient Response
LP38690 LP38692 20126640.gif
Figure 10. Load Transient Response
LP38690 LP38692 20126642.gif
Figure 12. Load Transient Response
LP38690 LP38692 20126644.gif
Figure 14. Load Transient Response
LP38690 LP38692 20126631.gif
Figure 16. VOUT vs Temperature (3.3 V)
LP38690 LP38692 20126633.gif
Figure 18. VOUT vs Temperature (1.8 V)
LP38690 LP38692 20126660.png
Figure 20. VOUT vs VIN (Power-Up)
LP38690 LP38692 20126651.gif
Figure 22. Dropout Voltage vs IOUT
LP38690 LP38692 20126653.gif
Figure 24. Load Regulation vs Temperature