SNVS324K January   2005  – January 2016 LP38691-ADJ , LP38691-ADJ-Q1 , LP38693-ADJ , LP38693-ADJ-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings: LP38691-ADJ, LP38693-ADJ
    3. 6.3 ESD Ratings: LP38691-ADJ-Q1, LP38693-ADJ-Q1
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Enable (EN)
      2. 7.3.2 Thermal Overload Protection (TSD)
      3. 7.3.3 Foldback Current Limiting
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable (EN)
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Setting the Output Voltage
        2. 8.2.2.2  External Capacitors
        3. 8.2.2.3  Input Capacitor
        4. 8.2.2.4  Output Capacitor
        5. 8.2.2.5  Capacitor Characteristics
          1. 8.2.2.5.1 Ceramic Capacitors
          2. 8.2.2.5.2 Tantalum Capacitors
        6. 8.2.2.6  RFI/EMI Susceptibility
        7. 8.2.2.7  Output Noise
        8. 8.2.2.8  Power Dissipation
        9. 8.2.2.9  Estimating Junction Temperature
        10. 8.2.2.10 Reverse Voltage
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 WSON Mounting
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)
MIN MAX UNIT
V(MAX) All pins (with respect to GND) –0.3 12 V
IOUT(4) Internally limited V
Power dissipation(3) Internally limited V
Junction temperature –40 150 °C
Storage temperature, Tstg −65 150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, contact the Texas Instruments Sales Office/ Distributors for availability and specifications.
(3) At elevated temperatures, device power dissipation must be derated based on package thermal resistance and heatsink values (if a heatsink is used). When using the WSON package, refer to Leadless Leadframe Package (LLP) (SNOA401) and the WSON Mounting section in this data sheet. If power dissipation causes the junction temperature to exceed specified limits, the device will go into thermal shutdown.
(4) If used in a dual-supply system where the regulator load is returned to a negative supply, the OUT pin must be diode clamped to ground.

6.2 ESD Ratings: LP38691-ADJ, LP38693-ADJ

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

6.3 ESD Ratings: LP38691-ADJ-Q1, LP38693-ADJ-Q1

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) 2000 V
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.4 Recommended Operating Conditions

MIN NOM MAX UNIT
VIN supply voltage 2.7 10 V
Operating junction temperature −40 125 °C

6.5 Thermal Information

THERMAL METRIC(1) LP3869x-ADJ LP38693-ADJ UNIT
WSON SOT-223
6 PINS 5 PINS
RθJA(2) Junction-to-ambient thermal resistance, High-K 50.6 68.5(3) °C/W
RθJC(top) Junction-to-case (top) thermal resistance 44.4 52.2
RθJB Junction-to-board thermal resistance 24.9 13.0
ψJT Junction-to-top characterization parameter 0.4 5.5
ψJB Junction-to-board characterization parameter 25.1 12.8
RθJC(bot) Junction-to-case (bottom) thermal resistance 5.4 n/a
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
(2) Thermal resistance value RθJA is based on the EIA/JEDEC High-K printed circuit board defined by: JESD51-7 - High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages.
(3) The PCB for the WSON (NGN) package RθJA includes thermal vias under the exposed thermal pad per EIA/JEDEC JESD51-5.

6.6 Electrical Characteristics

Unless otherwise specified, limits apply for TJ = 25°C, VIN = VOUT + 1 V, CIN = COUT = 10 µF, ILOAD = 10 mA. Minimum and maximum limits are specified through testing, statistical correlation, or design.
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
VADJ ADJ pin voltage VIN = 2.7 V 1.225 1.25 1.275 V
3.2 V ≤ VIN ≤ 10 V, 100 µA < IL < 0.5 A 1.25
3.2 V ≤ VIN ≤ 10 V, 100 µA < IL < 0.5 A
Full operating temperature range
1.2 1.3
ΔVOUT/ΔVIN Output voltage line regulation(2) VOUT + 0.5 V ≤ VIN ≤ 10 V
IL = 25 mA
0.03 %/V
VOUT + 0.5 V ≤ VIN ≤ 10 V
IL = 25 mA
Full operating temperature range
0.1
ΔVOUT/ΔIL Output voltage load regulation(3) 1 mA < IL < 0.5 A
VIN = VOUT + 1 V
1.8 %/A
1 mA < IL < 0.5 A
VIN = VOUT + 1 V
Full operating temperature range
5
VDO Dropout voltage(4) (VOUT = 2.5 V) IL = 0.1 A 80 mV
IL = 0.5 A 430
(VOUT = 2.5 V)
Full operating temperature range
IL = 0.1 A 145
IL = 0.5 A 725
(VOUT = 3.3 V) IL = 0.1 A 65
IL = 0.5 A 330
(VOUT = 3.3 V)
Full operating temperature range
IL = 0.1 A 110
IL = 0.5 A 550
(VOUT = 5 V) IL = 0.1 A 45
IL = 0.5 A 250
(VOUT = 5 V)
Full operating temperature range
IL = 0.1 A 100
IL = 0.5 A 450
IQ Quiescent current VIN ≤ 10 V, IL =100 µA – 0.5 A 55 µA
VIN ≤ 10 V, IL =100 µA – 0.5 A
Full operating temperature range
100
VEN ≤ 0.4 V, (LP38693 Only) 0.001 1
IL(MIN) Minimum load current VIN – VOUT ≤ 4 V
Full operating temperature range
100
IFB Foldback current limit VIN – VOUT > 5 V 350 mA
VIN – VOUT < 4 V 850
PSRR Ripple rejection VIN = VOUT + 2 V(DC), with 1 V(p-p) / 120-Hz Ripple 55 dB
TSD Thermal shutdown activation (junction temp) 160 °C
TSD (HYST) Thermal shutdown hysteresis (junction temp) 10
IADJ ADJ input leakage current VADJ = 0 V to 1.5 V, VIN = 10 V –100 0.01 100 nA
en Output noise BW = 10 Hz to 10 kHz
VOUT = 3.3 V
0.7 µV/√Hz
VOUT (LEAK) Output leakage current VOUT = VOUT(NOM) + 1 V at 10 VIN 0.5 2 µA
VEN Enable voltage (LP38693 Only) Output = OFF state
Full operating temperature range
0.4 V
Output = ON state, VIN = 4 V
Full operating temperature range
1.8
Output = ON state, VIN = 6 V
Full operating temperature range
3
Output = ON state, VIN = 10 V
Full operating temperature range
4
IEN EN pin leakage
(LP38693 only)
VEN = 0 V or 10 V, VIN = 10 V –1 0.001 1 µA
(1) Typical numbers represent the most likely parametric norm for 25°C operation.
(2) Output voltage line regulation is defined as the change in output voltage from nominal value resulting from a change in input voltage.
(3) Output voltage load regulation is defined as the change in output voltage from nominal value as the load current increases from 1 mA to full load.
(4) Dropout voltage is defined as the minimum input to output differential required to maintain the output within 100 mV of nominal value.

6.7 Typical Characteristics

Unless otherwise specified: TJ = 25°C, CIN = COUT = 10 µF, EN pin is tied to IN (LP38693-ADJ only), VOUT = 1.25 V, VIN = VOUT 1 V, ILOAD = 10 mA.
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126835.gif
Figure 1. Noise vs Frequency
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126837.gif Figure 3. Noise vs Frequency
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126836.gif
Figure 2. Noise vs Frequency
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126817.gif
Figure 4. Ripple Rejection
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126819.gif
Figure 5. Ripple Rejection
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126830.gif
Figure 7. VREF vs Temperature
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126824.gif
Figure 9. Line Transient Response
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126826.gif
Figure 11. Line Transient Response
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126828.gif
Figure 13. Line Transient Response
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126844.gif
Figure 15. Load Transient Response
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126854.gif
Figure 17. Load Regulation vs Temperature
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126858.png
VOUT = 1.25 V
Figure 19. VOUT vs VIN
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126860.png
Figure 21. VOUT vs. VIN, Power-up
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126862.png
Figure 23. VOUT vs. VEN, Off (LP38693-ADJ only)
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126857.gif
VOUT = 1.8 V
Figure 25. Dropout Voltage vs. IOUT
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126821.gif
Figure 6. Ripple Rejection
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126823.gif
Figure 8. Line Transient Response
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126825.gif
Figure 10. Line Transient Response
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126827.gif
Figure 12. Line Transient Response
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126842.gif
Figure 14. Load Transient Response
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126853.gif
Figure 16. EN Voltage vs Temperature
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126855.gif
Figure 18. Line Regulation vs Temperature
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126859.png
VOUT = 1.8 V
Figure 20. VOUT vs VIN
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126861.png
Figure 22. VOUT vs. VEN, On (LP38693-ADJ only)
LP38691-ADJ LP38693-ADJ LP38691-ADJ-Q1 LP38693-ADJ-Q1 20126856.gif
Figure 24. MIN VOUT vs. IOUT