SNVS323I December   2004  – February 2016 LP38690-ADJ , LP38692-ADJ

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Foldback Current Limiting
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable Pin (LP38692-ADJ Only)
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Reverse Voltage
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Setting The Output Voltage
        2. 8.2.2.2 External Capacitors
          1. 8.2.2.2.1 Input Capacitor
          2. 8.2.2.2.2 Output Capacitor
          3. 8.2.2.2.3 Selecting A Capacitor
            1. 8.2.2.2.3.1 Ceramic
            2. 8.2.2.2.3.2 Tantalum
        3. 8.2.2.3 RFI/EMI Susceptibility
        4. 8.2.2.4 Output Noise
        5. 8.2.2.5 Power Dissipation
        6. 8.2.2.6 Estimating Junction Temperature
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 WSON Mounting
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Power Supply Recommendations

The LP3869x-ADJ devices are designed to operate from an input supply voltage range of 2.7 V to 10 V. The input supply must be well regulated and free of spurious noise. To ensure that the LP3869x-ADJ output voltage is well regulated, the input supply must be at least VOUT + 0.5 V, or 2.7 V, whichever is higher. A minimum capacitor value of 1-μF is required to be within 1 cm of the IN pin.