The LP38690 and LP38692 low-dropout CMOS linear regulators provide tight output tolerance (2.5% typical), extremely low dropout voltage (450 mV at a 1-A load current, VOUT = 5 V), and excellent AC performance utilizing ultra low ESR ceramic output capacitors.
The low thermal resistance of the WSON, SOT-223, and TO-252 packages allow the full operating current to be used even in high ambient temperature environments.
The use of a PMOS power transistor means that no DC base drive current is required to bias it allowing ground pin current to remain below 100 µA regardless of load current, input voltage, or operating temperature.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
LP38690 | TO-252 (3) | 6.58 mm x 6.10 mm |
WSON (6) | 3.00 mm x 3.00 mm | |
LP38692 | SOT-223 (5) | 6.50 mm x 3.56 mm |
WSON (6) | 3.00 mm x 3.00 mm |
Changes from L Revision (March 2015) to M Revision
Changes from K Revision (December 2014) to L Revision
Changes from J Revision (April 2013) to K Revision
Changes from I Revision (April 2013) to J Revision
PIN | TYPE | DESCRIPTION | ||||
---|---|---|---|---|---|---|
NAME | LP38690 | LP38692 | ||||
TO-252 | WSON | SOT-223 | WSON | |||
EN | — | — | 1 | 3 | I | The Enable (EN) pin allows the part to be turned ON and OFF by pulling this pin HIGH or LOW. |
GND | TAB | 2 | 5 | 2 | — | Circuit ground for the regulator. For the TO-252 and SOT-223 packages this is thermally connected to the die and functions as a heat sink when soldered down to a large copper plane. |
IN | 3 | 1, 6 | 4 | 1, 6 | I | This is the input supply voltage to the regulator. For WSON devices, both IN pins must be tied together for full current operation (500 mA maximum per pin). |
OUT | 1 | 4 | 3 | 4 | O | Regulated output voltage. |
SNS | — | 5 | — | 5 | I | WSON only - Output sense pin allows remote sensing at the load which eliminates the error in output voltage due to voltage drops caused by the resistance in the traces between the regulator and the load. This pin must be tied to VOUT. |
DAP | — | X | — | X | — | WSON only - The DAP (Exposed Pad) functions as a thermal connection when soldered to a copper plane. See WSON Mounting section in Layout for more information. |
MIN | MAX | UNIT | ||
---|---|---|---|---|
V(max) All pins (with respect to GND) | –0.3 | 12 | V | |
IOUT(3) | Internally limited | |||
Junction temperature | −40 | 150 | °C | |
Lead temperature (soldering, 5 seconds) | 260 | |||
Power dissipation(2) | Internally limited | |||
Storage temperature, Tstg | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
VIN supply voltage | 2.7 | 10 | V | ||
Operating junction temperature | −40 | 125 | °C |
THERMAL METRIC(1) | LP38690 | LP38690/92 | LP38692 | UNIT | |
---|---|---|---|---|---|
TO-252 | WSON | SOT-223 | |||
3 PINS | 6 PINS | 5 PINS | |||
RθJA(2) | Junction-to-ambient thermal resistance | 50.5 | 50.6 | 68.5 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 52.6 | 44.4 | 52.2 | °C/W |
RθJB | Junction-to-board thermal resistance | 29.7 | 24.9 | 13.0 | °C/W |
ψJT | Junction-to-top characterization parameter | 4.8 | 0.4 | 5.5 | °C/W |
ψJB | Junction-to-board characterization parameter | 29.3 | 25.1 | 12.8 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | 1.5 | 5.4 | n/a | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP(1) | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
VOUT | Output voltage tolerance | –2.5 | 2.5 | %VOUT | |||
100 µA < IL < 1 A VO + 1 V ≤ VIN ≤ 10 V −40°C ≤ TJ ≤ 125°C |
–5 | 5 | |||||
ΔVOUT/ΔVIN | Output voltage line regulation(2) | VOUT + 0.5 V ≤ VIN ≤ 10 V IL = 25 mA |
0.03 | %/A | |||
VOUT + 0.5 V ≤ VIN ≤ 10 V IL = 25 mA −40°C ≤ TJ ≤ 125°C |
1 | ||||||
ΔVOUT/ΔIL | Output voltage load regulation(3) | 1 mA < IL < 1 A VIN = VOUT + 1 V |
1.8 | V | |||
1 mA < IL < 1 A VIN = VOUT + 1 V −40°C ≤ TJ ≤ 125°C |
5 | ||||||
VIN – VOUT | Dropout voltage(4) | VOUT = 1.8 V IL = 1 A |
950 | mV | |||
VOUT = 1.8 V IL = 1 A −40°C ≤ TJ ≤ 125°C |
1600 | ||||||
VOUT = 2.5 V | IL = 0.1 A | 80 | |||||
IL = 1 A | 800 | ||||||
VOUT = 2.5 V −40°C ≤ TJ ≤ 125°C |
IL = 0.1 A | 145 | |||||
IL = 1 A | 1300 | ||||||
VOUT = 3.3 V | IL = 0.1 A | 65 | |||||
IL = 1 A | 650 | ||||||
VOUT = 3.3 V −40°C ≤ TJ ≤ 125°C |
IL = 0.1 A | 110 | |||||
IL = 1 A | 1000 | ||||||
VOUT = 5 V | IL = 0.1 A | 45 | |||||
IL = 1 A | 450 | ||||||
VOUT = 5 V, −40°C ≤ TJ ≤ 125°C |
IL = 0.1 A | 100 | |||||
IL = 1 A | 800 | ||||||
IQ | Quiescent current | VIN ≤ 10 V, IL = 100 µA to 1 A | 55 | µA | |||
VIN ≤ 10 V, IL = 100 µA to 1 A −40°C ≤ TJ ≤ 125°C |
100 | ||||||
VEN ≤ 0.4 V (LP38692 only) | 0.001 | ||||||
IL(MIN) | Minimum load current | VIN – VOUT ≤ 4 V −40°C ≤ TJ ≤ 125°C |
100 | ||||
IFB | Foldback current limit | VIN – VOUT > 5 V | 450 | mA | |||
VIN – VOUT < 4 V | 1500 | ||||||
PSRR | Ripple rejection | VIN = VOUT + 2 V(DC), with 1V(p-p) / 120 Hz ripple | 55 | dB | |||
TSD | Thermal shutdown activation (junction temp) | 160 | °C | ||||
TSD (HYST) | Thermal shutdown hysteresis (junction temp) | 10 | |||||
en | Output noise | VOUT = 3.3 V, BW = 10 Hz to 10 kHz | 0.7 | µV/√Hz | |||
VOUT (LEAK) | Output leakage current | VOUT = VOUT(NOM) + 1 V at 10 VIN | 0.5 | 12 | µA | ||
VEN | Enable voltage (LP38692 only) | Output = OFF, −40°C ≤ TJ ≤ 125°C | 0.4 | V | |||
Output = ON, VIN = 4 V −40°C ≤ TJ ≤ 125°C |
1.8 | ||||||
Output = ON, VIN = 6 V −40°C ≤ TJ ≤ 125°C |
3 | ||||||
Output = ON, VIN = 10 V −40°C ≤ TJ ≤ 125°C |
4 | ||||||
IEN | Enable pin leakage | VEN = 0 V or 10 V, VIN = 10 V | –1 | 0.001 | 1 | µA |
The LP38690 and LP38692 devices are designed to meet the requirements of portable, battery-powered digital systems providing an accurate output voltage with fast start-up. When disabled via a low logic signal at the enable pin (EN), the power consumption is reduced to virtually zero (LP38692 only). The LP38690 and LP38692 perform well with a single 1-μF input capacitor and a single 1-μF ceramic output capacitor.
The LP38692 has an Enable pin (EN) which allows an external control signal to turn the regulator output On and Off. The Enable On/Off threshold has no hysteresis. The voltage signal must rise and fall cleanly, and promptly, through the ON and OFF voltage thresholds. The EN pin voltage must be higher than the VEN(MIN) threshold to ensure that the device is fully enabled under all operating conditions. The EN pin voltage must be lower than the VEN(MAX) threshold to ensure that the device is fully disabled. The Enable pin has no internal pull-up or pull-down to establish a default condition and, as a result, this pin must be terminated either actively or passively. If the Enable pin is driven from a source that actively pulls high and low, the drive voltage should not be allowed to go below ground potential or higher than VIN. If the application does not require the Enable function, the pin should be connected directly to the IN pin.
Thermal shutdown disables the output when the junction temperature rises to approximately 160°C which allows the device to cool. When the junction temperature cools to approximately 150°C, the output circuitry enables.
Based on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This thermal cycling limits the dissipation of the regulator and protects it from damage as a result of overheating.
The TSD circuitry of the LP38692 has been designed to protect against temporary thermal overload conditions. The TSD circuitry was not intended to replace proper heat-sinking. Continuously running the LP38692 device into thermal shutdown degrades device reliability.
Foldback current limiting is built into the LP38690 and LP38692 which reduces the amount of output current the part can deliver as the output voltage is reduced. The amount of load current is dependent on the differential voltage between VIN and VOUT. Typically, when this differential voltage exceeds 5 V, the load current limits at about 450 mA. When the VIN – VOUT differential is reduced below 4 V, load current is limited to about 1500 mA.
CAUTION
When toggling the LP38692 Enable (EN) after the input voltage (VIN) is applied, the foldback current limit circuitry is functional the first time that the EN pin is taken high. The foldback current limit circuitry is non-functional the second, and subsequent, times that the EN pin is taken high. Depending on the input and output capacitance values the input inrush current may be higher than expected which can cause the input voltage to droop.
If the EN pin is connected to the IN pin, the foldback current limit circuitry is functional when VIN is applied if VIN starts from less than 0.4 V.
The EN pin voltage must be higher than the VEN(MIN) threshold to ensure that the device is fully enabled under all operating conditions.
The LP38690 and LP38692 devices do not include any dedicated UVLO circuitry. The LP38690 and LP38692 internal circuitry is not fully functional until VIN is at least 2.7 V. The output voltage is not regulated until VIN ≥ (VOUT + VDO), or 2.7 V, whichever is higher.