7.3.1 Shutdown (SD)

The LM3871 and LP3874 devices have a shutdown feature that turns the device off and reduces the quiescent current to 10 nA, typical.

7.3.2 Short-Circuit Protection

The LP3871and LP3874 devices are short-circuit protected and, in the event of a peak overcurrent condition, the short-circuit control loop will rapidly drive the output PMOS pass element off. Once the power pass element shuts down, the control loop will rapidly cycle the output on and off until the average power dissipation causes the thermal shutdown circuit to respond to servo the on/off cycling to a lower frequency.

7.3.3 Low Dropout Voltage

The LP3871 and LP3874 devices feature an ultra-low-dropout voltage, typically 24 mV at 80-mA load current and 240 mV at 0.8-A load current.

The dropout voltage of a regulator is defined as the minimum input-to-output differential required to stay within 2% of the nominal output voltage. For CMOS LDOs, the dropout voltage is the product of the load current and the R_ds(on) of the internal MOSFET.

7.3.4 SENSE Pin

In applications where the regulator output is not very close to the load, LP3874 can provide better remote load regulation using the SENSE pin. Figure 9 depicts the advantage of the SENSE option. LP3871 regulates the voltage at the OUT pin. Hence, the voltage at the remote load will be the regulator output voltage minus the drop across the trace resistance. For example, in the case of a 3.3-V output, if the trace resistance is 100 mΩ, the voltage at the remote load will be 3.22 V with 0.8 A of load current, I_LOAD. The LP3874 regulates the voltage at the SENSE pin. Connecting the SENSE pin to the remote load will provide regulation at the remote load, as shown in Figure 9. If the SENSE option pin is not required, the SENSE pin must be connected to the OUT pin.

Figure 9. Improving Remote Load Regulation using LP3874

7.4.1 Shutdown Mode

A CMOS logic low level signal at the shutdown (SD) pin will turn off the regulator. The SD pin must be actively terminated through a 10-kΩ pullup resistor for a proper operation. If this pin is driven from a source that actively pulls high and low (such as a CMOS rail-to-rail comparator), the pullup resistor is not required. This pin must be tied to V_IN if not used.

7.4.2 Active Mode

When voltage at SD pin of the LP3871 and LP3874 devices is at logic high level, the device is in normal mode of operation.

7.4.3 ERROR Flag Operation

The LP3871 produces logic low signals at the ERROR Flag pin when the output drops out of regulation due to low input voltage, current limiting, or thermal limiting. This flag has a built-in hysteresis. The timing diagram in Figure 10 shows the relationship between the ERROR flag and the output voltage. In this example, the input voltage is changed to demonstrate the functionality of the ERROR Flag.

The internal ERROR flag comparator has an open drain output stage. Hence, the ERROR pin must be pulled high through a pullup resistor. Although the ERROR flag pin can sink current of 1mA, this current is energy drain from the input supply. Hence, the value of the pullup resistor must be in the range of 10 kΩ to 1 MΩ. The ERROR pin must be connected to ground if this function is not used. It must also be noted that when the shutdown pin is pulled low, the ERROR pin is forced to be invalid for reasons of saving power in shutdown mode.

Figure 10. ERROR Flag Operation