SNVS247E September 2003 – August 2016 LP3875-ADJ
PRODUCTION DATA.
The LP3875-ADJ linear regulators is designed to provide an ultra-low-dropout voltage with excellent transient response and load/line regulation. For battery-powered always-on type applications, the very low quiescent current of the LP3875-ADJ in shutdown mode helps reduce battery drain.
The LM3875-ADJ device has a shutdown feature that turns the device off and reduces the quiescent current to 10 nA (typical).
The LP3875-ADJ is short-circuit protected and, in the event of a peak overcurrent condition, the short-circuit control loop rapidly drives the output PMOS pass element off. Once the power pass element shuts down, the control loop rapidly cycles the output on and off until the average power dissipation causes the thermal shutdown circuit to respond to servo the on/off cycling to a lower frequency. Refer to Power Dissipation for power dissipation calculations.
The dropout voltage of a regulator is defined as the minimum input-to-output differential required to stay within 2% of the nominal output voltage. For CMOS LDOs, the dropout voltage is the product of the load current and the RDS(ON) of the internal MOSFET.
A CMOS logic low level signal at the shutdown (SD) pin turns off the regulator. The SD pin must be actively terminated through a 10-kΩ pullup resistor for a proper operation. If this pin is driven from a source that actively pulls high and low (such as a CMOS rail-to-rail comparator), the pullup resistor is not required. This pin must be tied to VIN if not used.
When voltage at SD pin of the LP3875-ADJ device is at logic high level, the device is in normal mode of operation.