SNVS311 Data sheet

SNVS311D May 2005 – February 2015 LP3878-ADJ

PRODUCTION DATA.

Package Options

Mechanical Data (Package|Pins)

DDA|8
- MPDS092F
NGT|8
- MPDS406A

Thermal pad, mechanical data (Package|Pins)

Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾⁽²⁾

	MIN	MAX	UNIT
SHUTDOWN pin		1	kV
Power dissipation⁽³⁾	Internally Limited
Input supply voltage (survival), V_IN	−0.3	16	V
ADJ pin	−0.3	6	V
Output voltage (survival), V_OUT⁽⁴⁾	−0.3	6	V
I_OUT (survival)	Short-Circuit Protected
Input – output voltage (survival), V_IN – V_OUT⁽⁵⁾	−0.3	16	V
Storage temperature, T_stg	–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) If Military- or Aerospace-specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.

(3) The maximum allowable power dissipation is a function of the maximum junction temperature, T_J(MAX), the junction-to-ambient thermal resistance, R_θJA, and the ambient temperature, T_A. The maximum allowable power dissipation at any ambient temperature is calculated using: P_(MAX) = (T_J(MAX) – T_A) / R_θJA. The value of R_θJA for the WSON (NGT) and SO PowerPAD (DDA) packages are specifically dependent on PCB trace area, trace material, and the number of layers and thermal vias. For improved thermal resistance and power dissipation for the WSON package, see Application Note AN-1187, SNOA401. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown.

(4) If used in a dual-supply system where the regulator load is returned to a negative supply, the LP3878-ADJ output must be diode-clamped to ground.

(5) The PNP pass element contains a parasitic diode between the IN pin and the OUT pin that is normally reverse-biased. Forcing the OUT pin voltage above the IN pin voltage will turn on this diode and may induce a latch-up mode which can damage the part (see Application and Implementation).

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins⁽¹⁾	±2000	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

		MIN	MAX	UNIT
V_IN	Supply input voltage	2.5	16	V
V_SD	SHUTDOWN input voltage		V_IN	V
I_OUT	Output current		800	mA
T_J	Operating junction temperature	−40	125	°C

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		LP3878-ADJ		UNIT
		DDA	NGT
		8 PINS
R_θJA	Junction-to-ambient thermal resistance	42.5	38.1	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	54.0	27.9
R_θJB	Junction-to-board thermal resistance	26.5	15.2
ψ_JT	Junction-to-top characterization parameter	8.0	0.2
ψ_JB	Junction-to-board characterization parameter	26.4	15.3
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	3.6	4.5

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

Limits are specified through design, testing, or correlation. The limits are used to calculate TI's Average Outgoing Quality Level (AOQL). Unless otherwise specified: T_J = 25°C, V_IN = 3 V, V_OUT = 1 V, I_OUT = 1 mA, C_OUT = 10 µF, C_IN = 4.7 µF, V_SD = 2 VV_SD, C_BYPASS = 10 nF.

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
V_ADJ	Adjust pin voltage		0.99	1.00	1.01	V
		1 mA ≤ I_OUT ≤ 800 mA, 3 V ≤ V_IN ≤ 6 V	0.98	1.00	1.02
		1 mA ≤ I_OUT ≤ 800 mA, 3 V ≤ V_IN ≤ 6 V –40°C ≤ T_J ≤ 125°C	0.97		1.03
ΔV_OUT/ΔV_IN	Output voltage line regulation	3 V ≤ V_IN ≤ 16 V		0.007	0.014	%/V
ΔV_OUT/ΔV_IN	Output voltage line regulation	3 V ≤ V_IN ≤ 16 V, –40°C ≤ T_J ≤ 125°C			0.032	%/V
V_IN(MIN)	Minimum input voltage required to maintain output regulation	I_OUT = 800 mA, V_OUT ≥ V_OUT(NOM) – 1%		2.5		V
		I_OUT = 800 mA, V_OUT ≥ V_OUT(NOM) – 1% –40°C ≤ T_J ≤ 125°C			3.1
		I_OUT = 800 mA, V_OUT ≥ V_OUT(NOM) – 1% 0 ≤ T_J ≤ 125°C		2.5
		I_OUT = 800 mA, V_OUT ≥ V_OUT(NOM) – 1% 0 ≤ T_J ≤ 125°C, –40°C ≤ T_J ≤ 125°C			2.8
		I_OUT = 750 mA, V_OUT ≥ V_OUT(NOM) – 1%		2.5
		I_OUT = 750 mA, V_OUT ≥ V_OUT(NOM) – 1% –40°C ≤ T_J ≤ 125°C			3.0
V_DOUT	Dropout voltage⁽¹⁾ V_OUT = 3.8 V	I_OUT = 100 µA		1	2	mV
		I_OUT = 100 µA, –40°C ≤ T_J ≤ 125°C			3
		I_OUT = 200 mA		150	200
		I_OUT = 200 mA, –40°C ≤ T_J ≤ 125°C			300
		I_OUT = 800 mA		475	600
		I_OUT = 800 mA, –40°C ≤ T_J ≤ 125°C			1100
I_GND	Ground pin current	I_OUT = 100 µA		180	200	µA
		I_OUT = 100 µA, –40°C ≤ T_J ≤ 125°C			225	µA
		I_OUT = 200 mA		1.5	2	mA
		I_OUT = 200 mA, –40°C ≤ T_J ≤ 125°C			3.5
		I_OUT = 800 mA		5.5	8.5
		I_OUT = 800 mA, –40°C ≤ T_J ≤ 125°C			15
I_OUT(PK)	Peak output current	V_OUT ≥ V_OUT(NOM)− 5%		1200		mA
I_OUT(MAX)	Short-circuit current	R_L = 0 Ω (steady state)		1300		mA
e_n	Output noise voltage (RMS)	Bandwidth = 100 Hz to 100 kHz, C_BYPASS = 10 nF		18		µV_(RMS)
ΔV_OUT/ΔV_IN	Ripple rejection	f = 1 kHz		60		dB
I_ADJ	ADJ pin bias current (sourcing)	I_OUT = 800 mA		200		nA
SHUTDOWN Input
V_SD	SHUTDOWN input voltage	V_H = Output ON		1.4		V
		V_H = Output ON, –40°C ≤ T_J ≤ 125°C			1.6
		V_L = Output OFF, I_IN ≤ 10 µA		0.20
		V_L = Output OFF, I_IN ≤ 10 µA –40°C ≤ T_J ≤ 125°C	0.04
		V_OUT ≤ 10 mV, I_IN ≤ 50 µA		0.6
I_SD	SHUTDOWN input current	V_SD = 0 V		0.02		µA
		V_SD = 0 V, –40°C ≤ T_J ≤ 125°C			−1
		V_SD = 5 V		5
		V_SD = 5 V, –40°C ≤ T_J ≤ 125°C			15