LP3982 Micropower, Ultra-Low-Dropout, Low-Noise, 300-mA CMOS Regulator
1 Features
- 2.5-V to 6-V Input Range
- MAX8860 Pin, Package, and Specification Compatible
- 300-mA Output Current
- 120-mV Typical Dropout at 300 mA
- 90-μA Typical Quiescent Current
- 1-nA Typical Shutdown Mode
- 60-dB Typical PSRR
- 120-μs Typical Turnon Time
- Stable With Small Ceramic Output Capacitors
- 37-μVRMS Output Voltage Noise
(10 Hz to 100 kHz) - Overtemperature/Overcurrent Protection
- ±2% Output Voltage Tolerance
- Create a Custom Design Using the LP3982 With the WEBENCH® Power Designer
2 Applications
- Wireless Handsets
- DSP Core Power
- Battery Powered Electronics
- Portable Information Appliances
3 Description
The LP3982 low-dropout (LDO) CMOS linear regulator is available in 1.8-V, 2.5-V, 2.82-V, 3-V,
3.3-V, and adjustable versions. They deliver 300 mA of output current. Packaged in an 8-pin VSSOP, the LP3982 is pin- and package-compatible with Maxim's MAX8860. The LM3982 is also available in the small footprint WSON package.
The LP3982 suits battery-powered applications because of its shutdown mode (1 nA typical), low quiescent current (90 μA typical), and LDO voltage (120 mV typical). The low dropout voltage allows for more utilization of a battery’s available energy by operating closer to its end-of-life voltage. The LP3982 device's PMOS output transistor consumes relatively no drive current compared to PNP LDO regulators.
This PMOS regulator is stable with small ceramic capacitive loads (2.2 μF typical).
These devices also include regulation fault detection, a bandgap voltage reference, constant current limiting, and thermal-overload protection.
Device Information(1)
| PART NUMBER | PACKAGE | BODY SIZE (NOM) |
|---|---|---|
| LP3982 | WSON (8) | 2.50 mm × 3.00 mm |
| VSSOP (8) | 3.00 mm × 3.00 mm |
- For all available packages, see the orderable addendum at the end of the data sheet.
Application Circuit (Fixed VOUT Version)
4 Revision History
Changes from E Revision (October 2015) to F Revision
- Added links for Webench and changed top navigator icon for TI Designs Go
Changes from D Revision (April 2013) to E Revision
- Added Device Information and Pin Configuration and Functions sections, ESD Ratings table, Feature Description, Device Functional Modes, Application and Implementation, Power Supply Recommendations, Layout, Device and Documentation Support, and Mechanical, Packaging, and Orderable Information sections; update Thermal InformationGo
- Deleted lead temperature from Abs Max table (in POA); revised wording for footnote 4 Go
Changes from C Revision (April 2013) to D Revision
- Changed layout of National Data Sheet to TI formatGo
5 Pin Configuration and Functions
Pin Functions
| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| CC | 6 | — | Connect a capacitor between CC pin and ground to reduce the output noise. The optimum value for CC is 33 nF. |
| FAULT | 8 | Output | FAULT pin goes low during out of regulation conditions like current limit and thermal shutdown, or when it approaches dropout. Requires a pullup resistor because it is an active-low, open-drain output. |
| GND | 3 | Ground | Ground |
| IN | 2 | Input | This is the input supply voltage to the regulator. |
| OUT | 1, 4 | Output | Regulated output voltage |
| SET | 5 | Input | In the adjustable version a resistor divider connected to this pin sets the output voltage. The SET pin is internally disconnected for the fixed versions. |
| SHDN | 7 | Input | The SHDN pin allows the part to be turned to an ON or OFF state by pulling SHDN pin high or low. |
| DAP | √ | — | WSON Only - The DAP (Die Attached Pad) is an exposed pad that does not have an internal connection; it functions as a thermal relief when soldered to a copper plane. It is recommend that the DAP be connected to GND. See WSON Mounting section for more information. |
