10.1 Layout Guidelines

The dynamic performance of the LP3991 is dependant on the layout of the PCB. PCB layout practices that are adequate for typical LDOs may degrade the PSRR or transient performance of the LP3991.

Best performance is achieved by placing all of the components on the same side of the PCB as the LP3991, as close as is practical to the LP3991 package. All component ground connections must be back to the LP3991 analog ground connection using as wide and as short of a copper trace as is practical.

Connections using long trace lengths, narrow trace widths, and connections through vias must be avoided. These add parasitic inductances and resistance that results in inferior performance especially during transient conditions.

A ground plane, either on the opposite side of a two-layer PCB, or embedded in a multi-layer PCB, is strongly recommended. This ground plane serves two purposes:

1. Provides a circuit reference plane to assure accuracy, and
2. Provides a thermal plane to remove heat from the LP3991 through thermal vias under the package DAP.

10.2 Layout Example

Figure 18. LP3991 Example Layout

10.3 DSBGA Mounting

The DSBGA package requires specific mounting techniques which are detailed in AN-1112 DSBGA Wafer Level Chip Scale Package. Referring to the section Surface Mount Technology (SMT) Assenbly Considerations, the pad style that must be used with the 4-pin package is a NSMD (non-solder mask defined) type.

For best results during assembly, alignment ordinals on the PCB may be used to facilitate placement of the DSBGA device.

10.4 DSBGA Light Sensitivity

Exposing the DSBGA device to direct sunlight may cause mis-operation of the device. Light sources such as halogen lamps can affect the electrical performance if brought near to the device.

The wavelengths that have the most detrimental effect are reds and infra-reds, which means that the fluorescent lighting used inside most buildings has little effect on performance.

Figure 19. LP3991 Used as a Post DC-DC Regulator