SLVSEH1B September   2018  – January 2019 LP5030 , LP5036

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Simplified Schematic
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Each Channel PWM Control
        1. 8.3.1.1 Independent Color Mixing Per RGB LED Module
        2. 8.3.1.2 Independent Intensity Control Per RGB LED Module
          1. 8.3.1.2.1 Intensity-Control Register Configuration
          2. 8.3.1.2.2 Logarithmic- or Linear-Scale Intensity Control
        3. 8.3.1.3 12-Bit, 29-kHz PWM Generator Per Channel
          1. 8.3.1.3.1 PWM Generator
        4. 8.3.1.4 PWM Phase-Shifting
      2. 8.3.2 LED Bank Control
      3. 8.3.3 Current Range Setting
      4. 8.3.4 Automatic Power-Save Mode
      5. 8.3.5 Protection Features
        1. 8.3.5.1 Thermal Shutdown
        2. 8.3.5.2 UVLO
    4. 8.4 Device Functional Modes
    5. 8.5 Programming
      1. 8.5.1 I2C Interface
        1. 8.5.1.1 Data Validity
        2. 8.5.1.2 Start and Stop Conditions
        3. 8.5.1.3 Transferring Data
        4. 8.5.1.4 I2C Slave Addressing
        5. 8.5.1.5 Control-Register Write Cycle
        6. 8.5.1.6 Control-Register Read Cycle
        7. 8.5.1.7 Auto-Increment Feature
    6. 8.6 Register Maps
      1. 8.6.1  DEVICE_CONFIG0 (Address = 0h) [reset = 0h]
        1. Table 6. DEVICE_CONFIG0 Register Field Descriptions
      2. 8.6.2  DEVICE_CONFIG1 (Address = 1h) [reset = 3Ch]
        1. Table 7. DEVICE_CONFIG1 Register Field Descriptions
      3. 8.6.3  LED_CONFIG0 (Address = 2h) [reset = 00h]
        1. Table 8. LED_CONFIG0 Register Field Descriptions
      4. 8.6.4  LED_CONFIG1 (Address = 3h) [reset = 00h]
        1. Table 9. LED_CONFIG1 Register Field Descriptions
      5. 8.6.5  BANK_BRIGHTNESS (Address = 4h) [reset = FFh]
        1. Table 10. BANK_BRIGHTNESS Register Field Descriptions
      6. 8.6.6  BANK_A_COLOR (Address = 5h) [reset = 00h]
        1. Table 11. BANK_A_COLOR Register Field Descriptions
      7. 8.6.7  BANK_B_COLOR (Address = 6h) [reset = 00h]
        1. Table 12. BANK_B_COLOR Register Field Descriptions
      8. 8.6.8  BANK_C_COLOR (Address = 7h) [reset = 00h]
        1. Table 13. BANK_C_COLOR Register Field Descriptions
      9. 8.6.9  LED0_BRIGHTNESS (Address = 8h) [reset = FFh]
        1. Table 14. LED0_BRIGHTNESS Register Field Descriptions
      10. 8.6.10 LED1_BRIGHTNESS (Address = 9h) [reset = FFh]
        1. Table 15. LED1_BRIGHTNESS Register Field Descriptions
      11. 8.6.11 LED2_BRIGHTNESS (Address = 0Ah) [reset = FFh]
        1. Table 16. LED2_BRIGHTNESS Register Field Descriptions
      12. 8.6.12 LED3_BRIGHTNESS (Address = 0Bh) [reset = FFh]
        1. Table 17. LED3_BRIGHTNESS Register Field Descriptions
      13. 8.6.13 LED4_BRIGHTNESS (Address = 0Ch) [reset = FFh]
        1. Table 18. LED4_BRIGHTNESS Register Field Descriptions
      14. 8.6.14 LED5_BRIGHTNESS (Address = 0Dh) [reset = FFh]
        1. Table 19. LED5_BRIGHTNESS Register Field Descriptions
      15. 8.6.15 LED6_BRIGHTNESS (Address = 0Eh) [reset = FFh]
        1. Table 20. LED6_BRIGHTNESS Register Field Descriptions
      16. 8.6.16 LED7_BRIGHTNESS (Address = 0Fh) [reset = FFh]
        1. Table 21. LED7_BRIGHTNESS Register Field Descriptions
      17. 8.6.17 LED8_BRIGHTNESS (Address = 10h) [reset = FFh]
        1. Table 22. LED8_BRIGHTNESS Register Field Descriptions
      18. 8.6.18 LED9_BRIGHTNESS (Address = 11h) [reset = FFh]
        1. Table 23. LED9_BRIGHTNESS Register Field Descriptions
      19. 8.6.19 LED10_BRIGHTNESS (Address = 12h) [reset = FFh]
        1. Table 24. LED10_BRIGHTNESS Register Field Descriptions
      20. 8.6.20 LED11_BRIGHTNESS (Address = 13h) [reset = FFh]
        1. Table 25. LED11_BRIGHTNESS Register Field Descriptions
      21. 8.6.21 OUT0_COLOR (Address = 14h) [reset = 00h]
        1. Table 26. OUT0_COLOR Register Field Descriptions
      22. 8.6.22 OUT1_COLOR (Address = 15h) [reset = 00h]
        1. Table 27. OUT1_COLOR Register Field Descriptions
      23. 8.6.23 OUT2_COLOR (Address = 16h) [reset = 00h]
        1. Table 28. OUT2_COLOR Register Field Descriptions
      24. 8.6.24 OUT3_COLOR (Address = 17h) [reset = 00h]
        1. Table 29. OUT3_COLOR Register Field Descriptions
      25. 8.6.25 OUT4_COLOR (Address = 18h) [reset = 00h]
        1. Table 30. OUT4_COLOR Register Field Descriptions
      26. 8.6.26 OUT5_COLOR (Address = 19h) [reset = 00h]
        1. Table 31. OUT5_COLOR Register Field Descriptions
      27. 8.6.27 OUT6_COLOR (Address = 1Ah) [reset = 00h]
        1. Table 32. OUT6_COLOR Register Field Descriptions
      28. 8.6.28 OUT7_COLOR (Address = 1Bh) [reset = 00h]
        1. Table 33. OUT7_COLOR Register Field Descriptions
      29. 8.6.29 OUT8_COLOR (Address = 1Ch) [reset = 00h]
        1. Table 34. OUT8_COLOR Register Field Descriptions
      30. 8.6.30 OUT9_COLOR (Address = 1Dh) [reset = 00h]
        1. Table 35. OUT9_COLOR Register Field Descriptions
      31. 8.6.31 OUT10_COLOR (Address = 1Eh) [reset = 00h]
        1. Table 36. OUT10_COLOR Register Field Descriptions
      32. 8.6.32 OUT11_COLOR (Address = 1Fh) [reset = 00h]
        1. Table 37. OUT11_COLOR Register Field Descriptions
      33. 8.6.33 OUT12_COLOR (Address = 20h) [reset = 00h]
        1. Table 38. OUT12_COLOR Register Field Descriptions
      34. 8.6.34 OUT13_COLOR (Address = 21h) [reset = 00h]
        1. Table 39. OUT13_COLOR Register Field Descriptions
      35. 8.6.35 OUT14_COLOR (Address = 22h) [reset = 00h]
        1. Table 40. OUT14_COLOR Register Field Descriptions
      36. 8.6.36 OUT15_COLOR (Address = 23h) [reset = 00h]
        1. Table 41. OUT15_COLOR Register Field Descriptions
      37. 8.6.37 OUT16_COLOR (Address = 24h) [reset = 00h]
        1. Table 42. OUT16_COLOR Register Field Descriptions
      38. 8.6.38 OUT17_COLOR (Address = 25h) [reset = 00h]
        1. Table 43. OUT17_COLOR Register Field Descriptions
      39. 8.6.39 OUT18_COLOR (Address = 26h) [reset = 00h]
        1. Table 44. OUT18_COLOR Register Field Descriptions
      40. 8.6.40 OUT19_COLOR (Address = 27h) [reset = 00h]
        1. Table 45. OUT19_COLOR Register Field Descriptions
      41. 8.6.41 OUT20_COLOR (Address = 28h) [reset = 00h]
        1. Table 46. OUT20_COLOR Register Field Descriptions
      42. 8.6.42 OUT21_COLOR (Address = 29h) [reset = 00h]
        1. Table 47. OUT21_COLOR Register Field Descriptions
      43. 8.6.43 OUT22_COLOR (Address = 2Ah) [reset = 00h]
        1. Table 48. OUT22_COLOR Register Field Descriptions
      44. 8.6.44 OUT23_COLOR (Address = 2Bh) [reset = 00h]
        1. Table 49. OUT23_COLOR Register Field Descriptions
      45. 8.6.45 OUT24_COLOR (Address = 2Ch) [reset = 00h]
        1. Table 50. OUT24_COLOR Register Field Descriptions
      46. 8.6.46 OUT25_COLOR (Address = 2Dh) [reset = 00h]
        1. Table 51. OUT25_COLOR Register Field Descriptions
      47. 8.6.47 OUT26_COLOR (Address = 2Eh) [reset = 00h]
        1. Table 52. OUT26_COLOR Register Field Descriptions
      48. 8.6.48 OUT27_COLOR (Address = 2Fh) [reset = 00h]
        1. Table 53. OUT27_COLOR Register Field Descriptions
      49. 8.6.49 OUT28_COLOR (Address = 30h) [reset = 00h]
        1. Table 54. OUT28_COLOR Register Field Descriptions
      50. 8.6.50 OUT29_COLOR (Address = 31h) [reset = 00h]
        1. Table 55. OUT29_COLOR Register Field Descriptions
      51. 8.6.51 OUT30_COLOR (Address = 32h) [reset = 00h]
        1. Table 56. OUT30_COLOR Register Field Descriptions
      52. 8.6.52 OUT31_COLOR (Address = 33h) [reset = 00h]
        1. Table 57. OUT31_COLOR Register Field Descriptions
      53. 8.6.53 OUT32_COLOR (Address = 34h) [reset = 00h]
        1. Table 58. OUT32_COLOR Register Field Descriptions
      54. 8.6.54 OUT33_COLOR (Address = 35h) [reset = 00h]
        1. Table 59. OUT33_COLOR Register Field Descriptions
      55. 8.6.55 OUT34_COLOR (Address = 36h) [reset = 00h]
        1. Table 60. OUT34_COLOR Register Field Descriptions
      56. 8.6.56 OUT35_COLOR (Address = 37h) [reset = 00h]
        1. Table 61. OUT35_COLOR Register Field Descriptions
      57. 8.6.57 RESET (Address = 38h) [reset = 00h]
        1. Table 62. RESET Register Field Descriptions
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.2 Detailed Design Procedure

The LP503x device scales up the reference current (IREF) set by the external resistor (RIREF) to sink the output current (IOUT) at each output port. can be used to calculate the target output current IMAX_SET:

LP5030 LP5036 Equation-2.gif

The SCL and SDA lines must each have a pullup resistor placed somewhere on the line (the pullup resistors are normally located on the bus master). In typical applications, values of 1.8 kΩ to 4.7 kΩ are used, depending on the bus capacitance, I/O voltage, and the desired communication speed. Selecting a smaller value increases the pullup speed, but slows the pulldown speed. If they want pull up quickly select the samller one but it will impact the pull down speed.

VCAP is the internal LDO output pin. This pin must be connected through a 1-μF capacitor to GND. Put the capacitor as close to the device as possible.

TI recommends having a 1-μF capacitor between VCC and GND to ensure proper operation. Put the capacitor as close to the device as possible.