SNVSCC9B November   2023  – December 2024 LP5812

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Time-Cross-Multiplexing (TCM) Scheme
        1. 7.3.1.1 Direct drive mode
        2. 7.3.1.2 TCM Drive Mode
        3. 7.3.1.3 Mix drive mode
        4. 7.3.1.4 Ghosting Elimination
      2. 7.3.2 Analog Dimming
      3. 7.3.3 PWM Dimming
      4. 7.3.4 Autonomous Animation Engine Control
        1. 7.3.4.1 Animation Engine Pattern
        2. 7.3.4.2 Sloper
        3. 7.3.4.3 Animation Engine Unit (AEU)
        4. 7.3.4.4 Animation Pause Unit (APU)
      5. 7.3.5 Protections and Diagnostics
        1. 7.3.5.1 LED Open Detections
        2. 7.3.5.2 LED Short Detections
        3. 7.3.5.3 Thermal Shutdown
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
    6. 7.6 Register Maps
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Application
      2. 8.2.2 Design Parameters
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1 Input Capacitor Selection
        2. 8.2.3.2 Program Procedure
        3. 8.2.3.3 Programming Example
      4. 8.2.4 Application Performance Plots
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YBH|9
  • DSD|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.1.4 Ghosting Elimination

The LP5812 integrates ghosting elimination circuits to avoid both upside and downside ghosting phenomenon. The ghosting elimination can be disabled by setting clamp_dis = 1h, which is default as 0 and enabling the function.

Voltage on the outputs is clamped during PWM off time in the rest of switching period, or during blank time period, which is set in 'clamp_sel' bit in Dev_Config12 register. The registers below show the effect of different clamp selection.

A middle voltage Vmid between VCC and VCC - Vf is used to clamp the OUTx (x = 0, 1, 2, 3), where Vf is the forward voltage of LED. This scheme can achieve both pre-discharge for scan switch FET and pre-charge for current sinks, which eliminate up-side and down-side ghosting issues in time-multiplexing topology. Since the clamp voltage for scan switch FET and current sinks is the same value, the reverse voltage on LED during deghosting is avoided. There are 4 options for Vmid which is selected in 'vmid_sel' bits in Dev_Config12 register, which can be used for different forward voltage range of different type LEDs.

LP5812 Ghosting elimination waveform when clamp_sel = 1 Figure 7-11 Ghosting elimination waveform when clamp_sel = 1
LP5812 Ghosting elimination waveform when clamp_sel = 0 Figure 7-12 Ghosting elimination waveform when clamp_sel = 0