SNVSCC9B November   2023  – December 2024 LP5812

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Time-Cross-Multiplexing (TCM) Scheme
        1. 7.3.1.1 Direct drive mode
        2. 7.3.1.2 TCM Drive Mode
        3. 7.3.1.3 Mix drive mode
        4. 7.3.1.4 Ghosting Elimination
      2. 7.3.2 Analog Dimming
      3. 7.3.3 PWM Dimming
      4. 7.3.4 Autonomous Animation Engine Control
        1. 7.3.4.1 Animation Engine Pattern
        2. 7.3.4.2 Sloper
        3. 7.3.4.3 Animation Engine Unit (AEU)
        4. 7.3.4.4 Animation Pause Unit (APU)
      5. 7.3.5 Protections and Diagnostics
        1. 7.3.5.1 LED Open Detections
        2. 7.3.5.2 LED Short Detections
        3. 7.3.5.3 Thermal Shutdown
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
    6. 7.6 Register Maps
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Application
      2. 8.2.2 Design Parameters
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1 Input Capacitor Selection
        2. 8.2.3.2 Program Procedure
        3. 8.2.3.3 Programming Example
      4. 8.2.4 Application Performance Plots
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YBH|9
  • DSD|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Thermal Information

THERMAL METRIC(1) LP5810/2 LP5811/3 UNIT
YBH (DSBGA) DSD (WSON) YBH (DSBGA) DRR (WSON)
9 PINS 8 PINS 12 PINS 12 PINS
RθJA Junction-to-ambient thermal resistance 113.1 50.8 92.1 47.5 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 0.6 51.1 0.4 45.1 °C/W
RθJB Junction-to-board thermal resistance 33.9 22.9 25.9 20.9 °C/W
ΨJT Junction-to-top characterization parameter 0.2 1.1 0.2 0.7 °C/W
ΨJB Junction-to-board characterization parameter 33.8 22.8 25.8 20.9 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a 8.5 n/a 6.6 °C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.