SNVSC54
January 2022
LP5861
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Device Comparison
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Analog Dimming (Current Gain Control)
8.3.2
PWM Dimming
8.3.3
ON and OFF Control
8.3.4
Data Refresh Mode
8.3.5
Full Addressable SRAM
8.3.6
Protections and Diagnostics
8.4
Device Functional Modes
8.5
Programming
8.6
Register Maps
8.6.1
CONFIG Registers
8.6.2
GROUP Registers
8.6.3
DOTGROUP Registers
8.6.4
DOTONOFF Registers
8.6.5
FAULT Registers
8.6.6
RESET Registers
8.6.7
DC Registers
8.6.8
PWM Registers
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Application
9.2.2
Design Requirements
9.2.3
Detailed Design Procedure
9.2.4
Program Procedure
9.2.5
Application Performance Plots
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Receiving Notification of Documentation Updates
12.2
Support Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RSM|32
MPQF195B
Thermal pad, mechanical data (Package|Pins)
RSM|32
QFND112H
Orderable Information
snvsc54_oa
snvsc54_pm
11.2
Layout Example
Figure 11-1
LP5861 Layout Example