SNVSCE3B May   2023  – November 2023 LP5866T

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Time-Multiplexing Matrix
      2. 7.3.2 Analog Dimming (Current Gain Control)
        1. 7.3.2.1 Global 3-Bits Maximum Current (MC) Setting
        2. 7.3.2.2 3 Groups of 7-Bits Color Current (CC) Setting
        3. 7.3.2.3 Individual 8-bit Dot Current (DC) Setting
      3. 7.3.3 PWM Dimming
        1. 7.3.3.1 Individual 8-Bit / 16-Bit PWM for Each LED Dot
        2. 7.3.3.2 Programmable Groups of 8-Bit PWM Dimming
        3. 7.3.3.3 8-Bit PWM for Global Dimming
      4. 7.3.4 ON and OFF Control
      5. 7.3.5 Data Refresh Mode
      6. 7.3.6 Full Addressable SRAM
      7. 7.3.7 Protections and Diagnostics
        1. 7.3.7.1 LED Open Detection
        2. 7.3.7.2 LED Short Detection
        3. 7.3.7.3 Thermal Shutdown
        4. 7.3.7.4 UVLO (Under Voltage Lock Out)
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 Interface Selection
      2. 7.5.2 I2C Interface
        1. 7.5.2.1 I2C Data Transactions
        2. 7.5.2.2 I2C Data Format
        3. 7.5.2.3 Multiple Devices Connection
      3. 7.5.3 Programming
        1. 7.5.3.1 SPI Data Transactions
        2. 7.5.3.2 SPI Data Format
        3. 7.5.3.3 Multiple Devices Connection
    6. 7.6 Register Maps
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Application
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1 Program Procedure
      4. 8.2.4 Application Performance Plots
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 VDD Input Supply Recommendations
      2. 8.3.2 VLED Input Supply Recommendations
      3. 8.3.3 VIO Input Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.5.2.2 I2C Data Format

The address and data bits are transmitted MSB first with 8-bits length format in each cycle. Each transmission is started with Address Byte 1, which are divided into 5-bits of the chip address, 2 higher bits of the register address, and 1 read/write bit. The other 8 lower bits of register address are put in Address Byte 2.The device supports both independent mode and broadcast mode. The auto-increment feature allows writing / reading several consecutive registers within one transmission. If not consecutive, a new transmission must be started.

Table 7-6 I2C Data Format
Address Byte1 Chip Address Register Address R/W
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Independent 1 0 0 ADDR1 ADDR0 9th bit 8th bit R: 1 W: 0
Broadcast 1 0 1 0 1
Address Byte2 Register Address
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
7th bit 6th bit 5th bit 4th bit 3th bit 2th bit 1th bit 0th bit
LP5866T I2C Write Timing Figure 7-14 I2C Write Timing
LP5866T I2C Read Timing Figure 7-15 I2C Read Timing