SNVSCE3B May   2023  – November 2023 LP5866T

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Time-Multiplexing Matrix
      2. 7.3.2 Analog Dimming (Current Gain Control)
        1. 7.3.2.1 Global 3-Bits Maximum Current (MC) Setting
        2. 7.3.2.2 3 Groups of 7-Bits Color Current (CC) Setting
        3. 7.3.2.3 Individual 8-bit Dot Current (DC) Setting
      3. 7.3.3 PWM Dimming
        1. 7.3.3.1 Individual 8-Bit / 16-Bit PWM for Each LED Dot
        2. 7.3.3.2 Programmable Groups of 8-Bit PWM Dimming
        3. 7.3.3.3 8-Bit PWM for Global Dimming
      4. 7.3.4 ON and OFF Control
      5. 7.3.5 Data Refresh Mode
      6. 7.3.6 Full Addressable SRAM
      7. 7.3.7 Protections and Diagnostics
        1. 7.3.7.1 LED Open Detection
        2. 7.3.7.2 LED Short Detection
        3. 7.3.7.3 Thermal Shutdown
        4. 7.3.7.4 UVLO (Under Voltage Lock Out)
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 Interface Selection
      2. 7.5.2 I2C Interface
        1. 7.5.2.1 I2C Data Transactions
        2. 7.5.2.2 I2C Data Format
        3. 7.5.2.3 Multiple Devices Connection
      3. 7.5.3 Programming
        1. 7.5.3.1 SPI Data Transactions
        2. 7.5.3.2 SPI Data Format
        3. 7.5.3.3 Multiple Devices Connection
    6. 7.6 Register Maps
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Application
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1 Program Procedure
      4. 8.2.4 Application Performance Plots
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 VDD Input Supply Recommendations
      2. 8.3.2 VLED Input Supply Recommendations
      3. 8.3.3 VIO Input Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.1 Time-Multiplexing Matrix

The LP5866T device uses a time-multiplexing matrix scheme to support up to 108 LED dots with one chip. The device integrates 18 current sinks with 6 scan lines to drive 18 × 6 = 108 LED dots or 6 × 6 = 36 RGB pixels. In matrix control scheme, the device scans from Line 0 to Line 5 sequentially as shown in Figure 7-1. Current gain and PWM duty registers are programmable for each LED dot to support individual analog and PWM dimming.

LP5866T Scan Line Control SchemeFigure 7-1 Scan Line Control Scheme

There are 6 high-side p-channel MOSFETs (PMOS) integrated in LP5866T device. The time-multiplexing matrix timing sequence follows the Figure 7-2.

LP5866T Time-Multiplexing Matrix Timing SequenceFigure 7-2 Time-Multiplexing Matrix Timing Sequence

One cycle time of the line switching can be calculated as below:

Equation 1. tline_switch = tPWM + tSW_BLK + 2 × tphase_shift
  • tPWM is the current sink active time, which equals to 8μs (PWM frequency set at 125kHz) or 16μs (PWM frequency set at 62.5kHz) by configuring 'PWM_Fre' in Dev_initial register.
  • tSW_BLK is the switch blank time, which equals to 1μs or 0.5μs by configuring 'SW_BLK' in Dev_config1 register.
  • tphase_shift is the PWM phase shift time, which equal to 0 or 125ns by configuring 'PWM_Phase_Shift' in Dev_config1 register.

Total display time for one complete sub-period is tsub_period and can be calculated by the following equation:

Equation 2. tsub_period = tline_switch × Scan_line#
  • Scan_line# is the scan line number determined by 'Max_Line_Num' in Dev_initial register.

The time-multiplexing matrix scheme time diagram is shown in Figure 7-3. The tCS_ON_Shift is the current sink turning on shift by configuring 'CS_ON_Shift' bit in Dev_config1 register.

LP5866T Time-Multiplexing Matrix Timing DiagramFigure 7-3 Time-Multiplexing Matrix Timing Diagram

The LP5866T device implements de-ghosting and low brightness compensation to remove the side effects of matrix topology:

  • De-ghosting: Both upside de-ghosting and downside de-ghosting are implemented to eliminate the LED's unexpected weak turn-on.
    • Upside_de-ghosting: discharge each scan line during blank state. By configuring the 'Up_Deghost' in Dev_config3 register, the LP5866T discharges and clamps the scan line switch to a certain voltage.
    • Downside_deghosting: pre-charge each current sink voltage during blank state. The de-ghosting capability can be adjusted through the 'Down_Deghost' in Dev_config3 register.

  • Low Brightness Compensation: three groups compensation are implemented to overcome the color-shift and non-uniformity in low brightness conditions. The compensation capability can be through 'Comp_Group1', 'Comp_Group2', and 'Comp_Group3' in Dev_config2 register.
    • Compensation_group 1: CS0, CS3, CS6, CS9, CS12, CS15.
    • Compensation_group 2: CS1, CS4, CS7, CS10, CS13, CS16.
    • Compensation_group 3: CS2, CS5, CS8, CS11, CS14, CS17.