SNVSCE3B May   2023  – November 2023 LP5866T

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Time-Multiplexing Matrix
      2. 7.3.2 Analog Dimming (Current Gain Control)
        1. 7.3.2.1 Global 3-Bits Maximum Current (MC) Setting
        2. 7.3.2.2 3 Groups of 7-Bits Color Current (CC) Setting
        3. 7.3.2.3 Individual 8-bit Dot Current (DC) Setting
      3. 7.3.3 PWM Dimming
        1. 7.3.3.1 Individual 8-Bit / 16-Bit PWM for Each LED Dot
        2. 7.3.3.2 Programmable Groups of 8-Bit PWM Dimming
        3. 7.3.3.3 8-Bit PWM for Global Dimming
      4. 7.3.4 ON and OFF Control
      5. 7.3.5 Data Refresh Mode
      6. 7.3.6 Full Addressable SRAM
      7. 7.3.7 Protections and Diagnostics
        1. 7.3.7.1 LED Open Detection
        2. 7.3.7.2 LED Short Detection
        3. 7.3.7.3 Thermal Shutdown
        4. 7.3.7.4 UVLO (Under Voltage Lock Out)
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 Interface Selection
      2. 7.5.2 I2C Interface
        1. 7.5.2.1 I2C Data Transactions
        2. 7.5.2.2 I2C Data Format
        3. 7.5.2.3 Multiple Devices Connection
      3. 7.5.3 Programming
        1. 7.5.3.1 SPI Data Transactions
        2. 7.5.3.2 SPI Data Format
        3. 7.5.3.3 Multiple Devices Connection
    6. 7.6 Register Maps
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Application
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1 Program Procedure
      4. 8.2.4 Application Performance Plots
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 VDD Input Supply Recommendations
      2. 8.3.2 VLED Input Supply Recommendations
      3. 8.3.3 VIO Input Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • LED matrix topology:

    • 18 constant current sinks with 6 scan switches for 108 LED dots
    • Configurable for 1 to 6 scan switches

  • Operating voltage range:
    • VCC/VLED range: 2.7V to 5.5V
    • Logic pins compatible with 1.8V, 3.3V, and 5V
  • 18 constant current sinks with high precision:
    • 100mA per current sink when VCC ≥ 3.3V
    • Device-to-device error: ±5%
    • Channel-to-channel error: ±5%
    • Phase-shift for balanced transient power
  • Ultra-low power consumption:
    • Shutdown mode: ICC ≤ 1μA when EN = Low
    • Standby mode: ICC ≤ 10μA when EN = High and CHIP_EN = 0 (data retained)
    • Active mode: ICC = 5mA (typ.) when channel current = 12.5mA
  • Flexible dimming options:
    • Individual ON/OFF control for each LED dot
    • Analog dimming (current gain control)
      • Global 7-step Maximum Current (MC) setting for all LED dots
      • 3 groups of 7-bit Color Current (CC) RGB setting
      • Individual 8-bit Dot Current (DC) setting for each LED dot
    • PWM dimming with audible-noise-free frequency
      • Global 8-bit PWM dimming for all LED dots
      • 3 programmable groups of 8-bit PWM dimming for LED dot arbitrary mapping
      • Individual 8-bit or 16-bit PWM dimming for each LED dot
  • Full addressable SRAM to minimize data traffic
  • Individual LED dot open/short detection
  • De-ghosting and low brightness compensation
  • Interface options:
    • 1MHz (max.) I2C interface when IFS = Low
    • 12MHz (max.) SPI interface when IFS = High